1/*
2 * Renesas Solutions Highlander FPGA I2C/SMBus support.
3 *
4 * Supported devices: R0P7780LC0011RL, R0P7785LC0011RL
5 *
6 * Copyright (C) 2008  Paul Mundt
7 * Copyright (C) 2008  Renesas Solutions Corp.
8 * Copyright (C) 2008  Atom Create Engineering Co., Ltd.
9 *
10 * This file is subject to the terms and conditions of the GNU General
11 * Public License version 2. See the file "COPYING" in the main directory
12 * of this archive for more details.
13 */
14#include <linux/module.h>
15#include <linux/interrupt.h>
16#include <linux/i2c.h>
17#include <linux/platform_device.h>
18#include <linux/completion.h>
19#include <linux/io.h>
20#include <linux/delay.h>
21#include <linux/slab.h>
22
23#define SMCR		0x00
24#define SMCR_START	(1 << 0)
25#define SMCR_IRIC	(1 << 1)
26#define SMCR_BBSY	(1 << 2)
27#define SMCR_ACKE	(1 << 3)
28#define SMCR_RST	(1 << 4)
29#define SMCR_IEIC	(1 << 6)
30
31#define SMSMADR		0x02
32
33#define SMMR		0x04
34#define SMMR_MODE0	(1 << 0)
35#define SMMR_MODE1	(1 << 1)
36#define SMMR_CAP	(1 << 3)
37#define SMMR_TMMD	(1 << 4)
38#define SMMR_SP		(1 << 7)
39
40#define SMSADR		0x06
41#define SMTRDR		0x46
42
43struct highlander_i2c_dev {
44	struct device		*dev;
45	void __iomem		*base;
46	struct i2c_adapter	adapter;
47	struct completion	cmd_complete;
48	unsigned long		last_read_time;
49	int			irq;
50	u8			*buf;
51	size_t			buf_len;
52};
53
54static bool iic_force_poll, iic_force_normal;
55static int iic_timeout = 1000, iic_read_delay;
56
57static inline void highlander_i2c_irq_enable(struct highlander_i2c_dev *dev)
58{
59	iowrite16(ioread16(dev->base + SMCR) | SMCR_IEIC, dev->base + SMCR);
60}
61
62static inline void highlander_i2c_irq_disable(struct highlander_i2c_dev *dev)
63{
64	iowrite16(ioread16(dev->base + SMCR) & ~SMCR_IEIC, dev->base + SMCR);
65}
66
67static inline void highlander_i2c_start(struct highlander_i2c_dev *dev)
68{
69	iowrite16(ioread16(dev->base + SMCR) | SMCR_START, dev->base + SMCR);
70}
71
72static inline void highlander_i2c_done(struct highlander_i2c_dev *dev)
73{
74	iowrite16(ioread16(dev->base + SMCR) | SMCR_IRIC, dev->base + SMCR);
75}
76
77static void highlander_i2c_setup(struct highlander_i2c_dev *dev)
78{
79	u16 smmr;
80
81	smmr = ioread16(dev->base + SMMR);
82	smmr |= SMMR_TMMD;
83
84	if (iic_force_normal)
85		smmr &= ~SMMR_SP;
86	else
87		smmr |= SMMR_SP;
88
89	iowrite16(smmr, dev->base + SMMR);
90}
91
92static void smbus_write_data(u8 *src, u16 *dst, int len)
93{
94	for (; len > 1; len -= 2) {
95		*dst++ = be16_to_cpup((__be16 *)src);
96		src += 2;
97	}
98
99	if (len)
100		*dst = *src << 8;
101}
102
103static void smbus_read_data(u16 *src, u8 *dst, int len)
104{
105	for (; len > 1; len -= 2) {
106		*(__be16 *)dst = cpu_to_be16p(src++);
107		dst += 2;
108	}
109
110	if (len)
111		*dst = *src >> 8;
112}
113
114static void highlander_i2c_command(struct highlander_i2c_dev *dev,
115				   u8 command, int len)
116{
117	unsigned int i;
118	u16 cmd = (command << 8) | command;
119
120	for (i = 0; i < len; i += 2) {
121		if (len - i == 1)
122			cmd = command << 8;
123		iowrite16(cmd, dev->base + SMSADR + i);
124		dev_dbg(dev->dev, "command data[%x] 0x%04x\n", i/2, cmd);
125	}
126}
127
128static int highlander_i2c_wait_for_bbsy(struct highlander_i2c_dev *dev)
129{
130	unsigned long timeout;
131
132	timeout = jiffies + msecs_to_jiffies(iic_timeout);
133	while (ioread16(dev->base + SMCR) & SMCR_BBSY) {
134		if (time_after(jiffies, timeout)) {
135			dev_warn(dev->dev, "timeout waiting for bus ready\n");
136			return -ETIMEDOUT;
137		}
138
139		msleep(1);
140	}
141
142	return 0;
143}
144
145static int highlander_i2c_reset(struct highlander_i2c_dev *dev)
146{
147	iowrite16(ioread16(dev->base + SMCR) | SMCR_RST, dev->base + SMCR);
148	return highlander_i2c_wait_for_bbsy(dev);
149}
150
151static int highlander_i2c_wait_for_ack(struct highlander_i2c_dev *dev)
152{
153	u16 tmp = ioread16(dev->base + SMCR);
154
155	if ((tmp & (SMCR_IRIC | SMCR_ACKE)) == SMCR_ACKE) {
156		dev_warn(dev->dev, "ack abnormality\n");
157		return highlander_i2c_reset(dev);
158	}
159
160	return 0;
161}
162
163static irqreturn_t highlander_i2c_irq(int irq, void *dev_id)
164{
165	struct highlander_i2c_dev *dev = dev_id;
166
167	highlander_i2c_done(dev);
168	complete(&dev->cmd_complete);
169
170	return IRQ_HANDLED;
171}
172
173static void highlander_i2c_poll(struct highlander_i2c_dev *dev)
174{
175	unsigned long timeout;
176	u16 smcr;
177
178	timeout = jiffies + msecs_to_jiffies(iic_timeout);
179	for (;;) {
180		smcr = ioread16(dev->base + SMCR);
181
182		/*
183		 * Don't bother checking ACKE here, this and the reset
184		 * are handled in highlander_i2c_wait_xfer_done() when
185		 * waiting for the ACK.
186		 */
187
188		if (smcr & SMCR_IRIC)
189			return;
190		if (time_after(jiffies, timeout))
191			break;
192
193		cpu_relax();
194		cond_resched();
195	}
196
197	dev_err(dev->dev, "polling timed out\n");
198}
199
200static inline int highlander_i2c_wait_xfer_done(struct highlander_i2c_dev *dev)
201{
202	if (dev->irq)
203		wait_for_completion_timeout(&dev->cmd_complete,
204					  msecs_to_jiffies(iic_timeout));
205	else
206		/* busy looping, the IRQ of champions */
207		highlander_i2c_poll(dev);
208
209	return highlander_i2c_wait_for_ack(dev);
210}
211
212static int highlander_i2c_read(struct highlander_i2c_dev *dev)
213{
214	int i, cnt;
215	u16 data[16];
216
217	if (highlander_i2c_wait_for_bbsy(dev))
218		return -EAGAIN;
219
220	highlander_i2c_start(dev);
221
222	if (highlander_i2c_wait_xfer_done(dev)) {
223		dev_err(dev->dev, "Arbitration loss\n");
224		return -EAGAIN;
225	}
226
227	/*
228	 * The R0P7780LC0011RL FPGA needs a significant delay between
229	 * data read cycles, otherwise the transceiver gets confused and
230	 * garbage is returned when the read is subsequently aborted.
231	 *
232	 * It is not sufficient to wait for BBSY.
233	 *
234	 * While this generally only applies to the older SH7780-based
235	 * Highlanders, the same issue can be observed on SH7785 ones,
236	 * albeit less frequently. SH7780-based Highlanders may need
237	 * this to be as high as 1000 ms.
238	 */
239	if (iic_read_delay && time_before(jiffies, dev->last_read_time +
240				 msecs_to_jiffies(iic_read_delay)))
241		msleep(jiffies_to_msecs((dev->last_read_time +
242				msecs_to_jiffies(iic_read_delay)) - jiffies));
243
244	cnt = (dev->buf_len + 1) >> 1;
245	for (i = 0; i < cnt; i++) {
246		data[i] = ioread16(dev->base + SMTRDR + (i * sizeof(u16)));
247		dev_dbg(dev->dev, "read data[%x] 0x%04x\n", i, data[i]);
248	}
249
250	smbus_read_data(data, dev->buf, dev->buf_len);
251
252	dev->last_read_time = jiffies;
253
254	return 0;
255}
256
257static int highlander_i2c_write(struct highlander_i2c_dev *dev)
258{
259	int i, cnt;
260	u16 data[16];
261
262	smbus_write_data(dev->buf, data, dev->buf_len);
263
264	cnt = (dev->buf_len + 1) >> 1;
265	for (i = 0; i < cnt; i++) {
266		iowrite16(data[i], dev->base + SMTRDR + (i * sizeof(u16)));
267		dev_dbg(dev->dev, "write data[%x] 0x%04x\n", i, data[i]);
268	}
269
270	if (highlander_i2c_wait_for_bbsy(dev))
271		return -EAGAIN;
272
273	highlander_i2c_start(dev);
274
275	return highlander_i2c_wait_xfer_done(dev);
276}
277
278static int highlander_i2c_smbus_xfer(struct i2c_adapter *adap, u16 addr,
279				  unsigned short flags, char read_write,
280				  u8 command, int size,
281				  union i2c_smbus_data *data)
282{
283	struct highlander_i2c_dev *dev = i2c_get_adapdata(adap);
284	u16 tmp;
285
286	init_completion(&dev->cmd_complete);
287
288	dev_dbg(dev->dev, "addr %04x, command %02x, read_write %d, size %d\n",
289		addr, command, read_write, size);
290
291	/*
292	 * Set up the buffer and transfer size
293	 */
294	switch (size) {
295	case I2C_SMBUS_BYTE_DATA:
296		dev->buf = &data->byte;
297		dev->buf_len = 1;
298		break;
299	case I2C_SMBUS_I2C_BLOCK_DATA:
300		dev->buf = &data->block[1];
301		dev->buf_len = data->block[0];
302		break;
303	default:
304		dev_err(dev->dev, "unsupported command %d\n", size);
305		return -EINVAL;
306	}
307
308	/*
309	 * Encode the mode setting
310	 */
311	tmp = ioread16(dev->base + SMMR);
312	tmp &= ~(SMMR_MODE0 | SMMR_MODE1);
313
314	switch (dev->buf_len) {
315	case 1:
316		/* default */
317		break;
318	case 8:
319		tmp |= SMMR_MODE0;
320		break;
321	case 16:
322		tmp |= SMMR_MODE1;
323		break;
324	case 32:
325		tmp |= (SMMR_MODE0 | SMMR_MODE1);
326		break;
327	default:
328		dev_err(dev->dev, "unsupported xfer size %d\n", dev->buf_len);
329		return -EINVAL;
330	}
331
332	iowrite16(tmp, dev->base + SMMR);
333
334	/* Ensure we're in a sane state */
335	highlander_i2c_done(dev);
336
337	/* Set slave address */
338	iowrite16((addr << 1) | read_write, dev->base + SMSMADR);
339
340	highlander_i2c_command(dev, command, dev->buf_len);
341
342	if (read_write == I2C_SMBUS_READ)
343		return highlander_i2c_read(dev);
344	else
345		return highlander_i2c_write(dev);
346}
347
348static u32 highlander_i2c_func(struct i2c_adapter *adapter)
349{
350	return I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_I2C_BLOCK;
351}
352
353static const struct i2c_algorithm highlander_i2c_algo = {
354	.smbus_xfer	= highlander_i2c_smbus_xfer,
355	.functionality	= highlander_i2c_func,
356};
357
358static int highlander_i2c_probe(struct platform_device *pdev)
359{
360	struct highlander_i2c_dev *dev;
361	struct i2c_adapter *adap;
362	struct resource *res;
363	int ret;
364
365	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
366	if (unlikely(!res)) {
367		dev_err(&pdev->dev, "no mem resource\n");
368		return -ENODEV;
369	}
370
371	dev = kzalloc(sizeof(struct highlander_i2c_dev), GFP_KERNEL);
372	if (unlikely(!dev))
373		return -ENOMEM;
374
375	dev->base = ioremap_nocache(res->start, resource_size(res));
376	if (unlikely(!dev->base)) {
377		ret = -ENXIO;
378		goto err;
379	}
380
381	dev->dev = &pdev->dev;
382	platform_set_drvdata(pdev, dev);
383
384	dev->irq = platform_get_irq(pdev, 0);
385	if (iic_force_poll)
386		dev->irq = 0;
387
388	if (dev->irq) {
389		ret = request_irq(dev->irq, highlander_i2c_irq, 0,
390				  pdev->name, dev);
391		if (unlikely(ret))
392			goto err_unmap;
393
394		highlander_i2c_irq_enable(dev);
395	} else {
396		dev_notice(&pdev->dev, "no IRQ, using polling mode\n");
397		highlander_i2c_irq_disable(dev);
398	}
399
400	dev->last_read_time = jiffies;	/* initial read jiffies */
401
402	highlander_i2c_setup(dev);
403
404	adap = &dev->adapter;
405	i2c_set_adapdata(adap, dev);
406	adap->owner = THIS_MODULE;
407	adap->class = I2C_CLASS_HWMON;
408	strlcpy(adap->name, "HL FPGA I2C adapter", sizeof(adap->name));
409	adap->algo = &highlander_i2c_algo;
410	adap->dev.parent = &pdev->dev;
411	adap->nr = pdev->id;
412
413	/*
414	 * Reset the adapter
415	 */
416	ret = highlander_i2c_reset(dev);
417	if (unlikely(ret)) {
418		dev_err(&pdev->dev, "controller didn't come up\n");
419		goto err_free_irq;
420	}
421
422	ret = i2c_add_numbered_adapter(adap);
423	if (unlikely(ret)) {
424		dev_err(&pdev->dev, "failure adding adapter\n");
425		goto err_free_irq;
426	}
427
428	return 0;
429
430err_free_irq:
431	if (dev->irq)
432		free_irq(dev->irq, dev);
433err_unmap:
434	iounmap(dev->base);
435err:
436	kfree(dev);
437
438	return ret;
439}
440
441static int highlander_i2c_remove(struct platform_device *pdev)
442{
443	struct highlander_i2c_dev *dev = platform_get_drvdata(pdev);
444
445	i2c_del_adapter(&dev->adapter);
446
447	if (dev->irq)
448		free_irq(dev->irq, dev);
449
450	iounmap(dev->base);
451	kfree(dev);
452
453	return 0;
454}
455
456static struct platform_driver highlander_i2c_driver = {
457	.driver		= {
458		.name	= "i2c-highlander",
459	},
460
461	.probe		= highlander_i2c_probe,
462	.remove		= highlander_i2c_remove,
463};
464
465module_platform_driver(highlander_i2c_driver);
466
467MODULE_AUTHOR("Paul Mundt");
468MODULE_DESCRIPTION("Renesas Highlander FPGA I2C/SMBus adapter");
469MODULE_LICENSE("GPL v2");
470
471module_param(iic_force_poll, bool, 0);
472module_param(iic_force_normal, bool, 0);
473module_param(iic_timeout, int, 0);
474module_param(iic_read_delay, int, 0);
475
476MODULE_PARM_DESC(iic_force_poll, "Force polling mode");
477MODULE_PARM_DESC(iic_force_normal,
478		 "Force normal mode (100 kHz), default is fast mode (400 kHz)");
479MODULE_PARM_DESC(iic_timeout, "Set timeout value in msecs (default 1000 ms)");
480MODULE_PARM_DESC(iic_read_delay,
481		 "Delay between data read cycles (default 0 ms)");
482