1#ifndef __NOUVEAU_DRMCLI_H__
2#define __NOUVEAU_DRMCLI_H__
3
4#define DRIVER_AUTHOR		"Nouveau Project"
5#define DRIVER_EMAIL		"nouveau@lists.freedesktop.org"
6
7#define DRIVER_NAME		"nouveau"
8#define DRIVER_DESC		"nVidia Riva/TNT/GeForce/Quadro/Tesla"
9#define DRIVER_DATE		"20120801"
10
11#define DRIVER_MAJOR		1
12#define DRIVER_MINOR		2
13#define DRIVER_PATCHLEVEL	2
14
15/*
16 * 1.1.1:
17 * 	- added support for tiled system memory buffer objects
18 *      - added support for NOUVEAU_GETPARAM_GRAPH_UNITS on [nvc0,nve0].
19 *      - added support for compressed memory storage types on [nvc0,nve0].
20 *      - added support for software methods 0x600,0x644,0x6ac on nvc0
21 *        to control registers on the MPs to enable performance counters,
22 *        and to control the warp error enable mask (OpenGL requires out of
23 *        bounds access to local memory to be silently ignored / return 0).
24 * 1.1.2:
25 *      - fixes multiple bugs in flip completion events and timestamping
26 * 1.2.0:
27 * 	- object api exposed to userspace
28 * 	- fermi,kepler,maxwell zbc
29 * 1.2.1:
30 *      - allow concurrent access to bo's mapped read/write.
31 * 1.2.2:
32 *      - add NOUVEAU_GEM_DOMAIN_COHERENT flag
33 */
34
35#include <nvif/client.h>
36#include <nvif/device.h>
37
38#include <drmP.h>
39
40#include <drm/ttm/ttm_bo_api.h>
41#include <drm/ttm/ttm_bo_driver.h>
42#include <drm/ttm/ttm_placement.h>
43#include <drm/ttm/ttm_memory.h>
44#include <drm/ttm/ttm_module.h>
45#include <drm/ttm/ttm_page_alloc.h>
46
47#include "uapi/drm/nouveau_drm.h"
48
49struct nouveau_channel;
50struct platform_device;
51
52#define DRM_FILE_PAGE_OFFSET (0x100000000ULL >> PAGE_SHIFT)
53
54#include "nouveau_fence.h"
55#include "nouveau_bios.h"
56
57struct nouveau_drm_tile {
58	struct nouveau_fence *fence;
59	bool used;
60};
61
62enum nouveau_drm_object_route {
63	NVDRM_OBJECT_NVIF = 0,
64	NVDRM_OBJECT_USIF,
65	NVDRM_OBJECT_ABI16,
66};
67
68enum nouveau_drm_notify_route {
69	NVDRM_NOTIFY_NVIF = 0,
70	NVDRM_NOTIFY_USIF
71};
72
73enum nouveau_drm_handle {
74	NVDRM_CLIENT  = 0xffffffff,
75	NVDRM_DEVICE  = 0xdddddddd,
76	NVDRM_CONTROL = 0xdddddddc,
77	NVDRM_DISPLAY = 0xd1500000,
78	NVDRM_PUSH    = 0xbbbb0000, /* |= client chid */
79	NVDRM_CHAN    = 0xcccc0000, /* |= client chid */
80	NVDRM_NVSW    = 0x55550000,
81};
82
83struct nouveau_cli {
84	struct nvif_client base;
85	struct nvkm_vm *vm; /*XXX*/
86	struct list_head head;
87	struct mutex mutex;
88	void *abi16;
89	struct list_head objects;
90	struct list_head notifys;
91};
92
93static inline struct nouveau_cli *
94nouveau_cli(struct drm_file *fpriv)
95{
96	return fpriv ? fpriv->driver_priv : NULL;
97}
98
99#include <nvif/object.h>
100#include <nvif/device.h>
101
102extern int nouveau_runtime_pm;
103
104struct nouveau_drm {
105	struct nouveau_cli client;
106	struct drm_device *dev;
107
108	struct nvif_device device;
109	struct list_head clients;
110
111	struct {
112		enum {
113			UNKNOWN = 0,
114			DISABLE = 1,
115			ENABLED = 2
116		} stat;
117		u32 base;
118		u32 size;
119	} agp;
120
121	/* TTM interface support */
122	struct {
123		struct drm_global_reference mem_global_ref;
124		struct ttm_bo_global_ref bo_global_ref;
125		struct ttm_bo_device bdev;
126		atomic_t validate_sequence;
127		int (*move)(struct nouveau_channel *,
128			    struct ttm_buffer_object *,
129			    struct ttm_mem_reg *, struct ttm_mem_reg *);
130		struct nouveau_channel *chan;
131		struct nvif_object copy;
132		int mtrr;
133	} ttm;
134
135	/* GEM interface support */
136	struct {
137		u64 vram_available;
138		u64 gart_available;
139	} gem;
140
141	/* synchronisation */
142	void *fence;
143
144	/* context for accelerated drm-internal operations */
145	struct nouveau_channel *cechan;
146	struct nouveau_channel *channel;
147	struct nvkm_gpuobj *notify;
148	struct nouveau_fbdev *fbcon;
149	struct nvif_object nvsw;
150	struct nvif_object ntfy;
151
152	/* nv10-nv40 tiling regions */
153	struct {
154		struct nouveau_drm_tile reg[15];
155		spinlock_t lock;
156	} tile;
157
158	/* modesetting */
159	struct nvbios vbios;
160	struct nouveau_display *display;
161	struct backlight_device *backlight;
162
163	/* power management */
164	struct nouveau_hwmon *hwmon;
165	struct nouveau_sysfs *sysfs;
166
167	/* display power reference */
168	bool have_disp_power_ref;
169
170	struct dev_pm_domain vga_pm_domain;
171	struct pci_dev *hdmi_device;
172};
173
174static inline struct nouveau_drm *
175nouveau_drm(struct drm_device *dev)
176{
177	return dev->dev_private;
178}
179
180int nouveau_pmops_suspend(struct device *);
181int nouveau_pmops_resume(struct device *);
182
183#define nouveau_platform_device_create(p, u)                                   \
184	nouveau_platform_device_create_(p, sizeof(**u), (void **)u)
185struct drm_device *
186nouveau_platform_device_create_(struct platform_device *pdev,
187				int size, void **pobject);
188void nouveau_drm_device_remove(struct drm_device *dev);
189
190#define NV_PRINTK(l,c,f,a...) do {                                             \
191	struct nouveau_cli *_cli = (c);                                        \
192	nv_##l(_cli->base.base.priv, f, ##a);                                  \
193} while(0)
194#define NV_FATAL(drm,f,a...) NV_PRINTK(fatal, &(drm)->client, f, ##a)
195#define NV_ERROR(drm,f,a...) NV_PRINTK(error, &(drm)->client, f, ##a)
196#define NV_WARN(drm,f,a...) NV_PRINTK(warn, &(drm)->client, f, ##a)
197#define NV_INFO(drm,f,a...) NV_PRINTK(info, &(drm)->client, f, ##a)
198#define NV_DEBUG(drm,f,a...) NV_PRINTK(debug, &(drm)->client, f, ##a)
199
200extern int nouveau_modeset;
201
202#endif
203