1/* Copyright (c) 2010, Code Aurora Forum. All rights reserved. 2 * 3 * This program is free software; you can redistribute it and/or modify 4 * it under the terms of the GNU General Public License version 2 and 5 * only version 2 as published by the Free Software Foundation. 6 * 7 * This program is distributed in the hope that it will be useful, 8 * but WITHOUT ANY WARRANTY; without even the implied warranty of 9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 10 * GNU General Public License for more details. 11 * 12 * You should have received a copy of the GNU General Public License 13 * along with this program; if not, write to the Free Software 14 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 15 * 02110-1301, USA. 16 */ 17#include <linux/gpio.h> 18#include <linux/i2c.h> 19#include <linux/init.h> 20#include <linux/interrupt.h> 21#include <linux/irq.h> 22#include <linux/module.h> 23#include <linux/mutex.h> 24#include <linux/slab.h> 25#include <linux/i2c/sx150x.h> 26#include <linux/of.h> 27#include <linux/of_address.h> 28#include <linux/of_irq.h> 29#include <linux/of_gpio.h> 30#include <linux/of_device.h> 31 32#define NO_UPDATE_PENDING -1 33 34/* The chip models of sx150x */ 35#define SX150X_456 0 36#define SX150X_789 1 37 38struct sx150x_456_pri { 39 u8 reg_pld_mode; 40 u8 reg_pld_table0; 41 u8 reg_pld_table1; 42 u8 reg_pld_table2; 43 u8 reg_pld_table3; 44 u8 reg_pld_table4; 45 u8 reg_advance; 46}; 47 48struct sx150x_789_pri { 49 u8 reg_drain; 50 u8 reg_polarity; 51 u8 reg_clock; 52 u8 reg_misc; 53 u8 reg_reset; 54 u8 ngpios; 55}; 56 57struct sx150x_device_data { 58 u8 model; 59 u8 reg_pullup; 60 u8 reg_pulldn; 61 u8 reg_dir; 62 u8 reg_data; 63 u8 reg_irq_mask; 64 u8 reg_irq_src; 65 u8 reg_sense; 66 u8 ngpios; 67 union { 68 struct sx150x_456_pri x456; 69 struct sx150x_789_pri x789; 70 } pri; 71}; 72 73struct sx150x_chip { 74 struct gpio_chip gpio_chip; 75 struct i2c_client *client; 76 const struct sx150x_device_data *dev_cfg; 77 int irq_summary; 78 int irq_base; 79 int irq_update; 80 u32 irq_sense; 81 u32 irq_masked; 82 u32 dev_sense; 83 u32 dev_masked; 84 struct irq_chip irq_chip; 85 struct mutex lock; 86}; 87 88static const struct sx150x_device_data sx150x_devices[] = { 89 [0] = { /* sx1508q */ 90 .model = SX150X_789, 91 .reg_pullup = 0x03, 92 .reg_pulldn = 0x04, 93 .reg_dir = 0x07, 94 .reg_data = 0x08, 95 .reg_irq_mask = 0x09, 96 .reg_irq_src = 0x0c, 97 .reg_sense = 0x0b, 98 .pri.x789 = { 99 .reg_drain = 0x05, 100 .reg_polarity = 0x06, 101 .reg_clock = 0x0f, 102 .reg_misc = 0x10, 103 .reg_reset = 0x7d, 104 }, 105 .ngpios = 8, 106 }, 107 [1] = { /* sx1509q */ 108 .model = SX150X_789, 109 .reg_pullup = 0x07, 110 .reg_pulldn = 0x09, 111 .reg_dir = 0x0f, 112 .reg_data = 0x11, 113 .reg_irq_mask = 0x13, 114 .reg_irq_src = 0x19, 115 .reg_sense = 0x17, 116 .pri.x789 = { 117 .reg_drain = 0x0b, 118 .reg_polarity = 0x0d, 119 .reg_clock = 0x1e, 120 .reg_misc = 0x1f, 121 .reg_reset = 0x7d, 122 }, 123 .ngpios = 16 124 }, 125 [2] = { /* sx1506q */ 126 .model = SX150X_456, 127 .reg_pullup = 0x05, 128 .reg_pulldn = 0x07, 129 .reg_dir = 0x03, 130 .reg_data = 0x01, 131 .reg_irq_mask = 0x09, 132 .reg_irq_src = 0x0f, 133 .reg_sense = 0x0d, 134 .pri.x456 = { 135 .reg_pld_mode = 0x21, 136 .reg_pld_table0 = 0x23, 137 .reg_pld_table1 = 0x25, 138 .reg_pld_table2 = 0x27, 139 .reg_pld_table3 = 0x29, 140 .reg_pld_table4 = 0x2b, 141 .reg_advance = 0xad, 142 }, 143 .ngpios = 16 144 }, 145}; 146 147static const struct i2c_device_id sx150x_id[] = { 148 {"sx1508q", 0}, 149 {"sx1509q", 1}, 150 {"sx1506q", 2}, 151 {} 152}; 153MODULE_DEVICE_TABLE(i2c, sx150x_id); 154 155static const struct of_device_id sx150x_of_match[] = { 156 { .compatible = "semtech,sx1508q" }, 157 { .compatible = "semtech,sx1509q" }, 158 { .compatible = "semtech,sx1506q" }, 159 {}, 160}; 161MODULE_DEVICE_TABLE(of, sx150x_of_match); 162 163static s32 sx150x_i2c_write(struct i2c_client *client, u8 reg, u8 val) 164{ 165 s32 err = i2c_smbus_write_byte_data(client, reg, val); 166 167 if (err < 0) 168 dev_warn(&client->dev, 169 "i2c write fail: can't write %02x to %02x: %d\n", 170 val, reg, err); 171 return err; 172} 173 174static s32 sx150x_i2c_read(struct i2c_client *client, u8 reg, u8 *val) 175{ 176 s32 err = i2c_smbus_read_byte_data(client, reg); 177 178 if (err >= 0) 179 *val = err; 180 else 181 dev_warn(&client->dev, 182 "i2c read fail: can't read from %02x: %d\n", 183 reg, err); 184 return err; 185} 186 187static inline bool offset_is_oscio(struct sx150x_chip *chip, unsigned offset) 188{ 189 return (chip->dev_cfg->ngpios == offset); 190} 191 192/* 193 * These utility functions solve the common problem of locating and setting 194 * configuration bits. Configuration bits are grouped into registers 195 * whose indexes increase downwards. For example, with eight-bit registers, 196 * sixteen gpios would have their config bits grouped in the following order: 197 * REGISTER N-1 [ f e d c b a 9 8 ] 198 * N [ 7 6 5 4 3 2 1 0 ] 199 * 200 * For multi-bit configurations, the pattern gets wider: 201 * REGISTER N-3 [ f f e e d d c c ] 202 * N-2 [ b b a a 9 9 8 8 ] 203 * N-1 [ 7 7 6 6 5 5 4 4 ] 204 * N [ 3 3 2 2 1 1 0 0 ] 205 * 206 * Given the address of the starting register 'N', the index of the gpio 207 * whose configuration we seek to change, and the width in bits of that 208 * configuration, these functions allow us to locate the correct 209 * register and mask the correct bits. 210 */ 211static inline void sx150x_find_cfg(u8 offset, u8 width, 212 u8 *reg, u8 *mask, u8 *shift) 213{ 214 *reg -= offset * width / 8; 215 *mask = (1 << width) - 1; 216 *shift = (offset * width) % 8; 217 *mask <<= *shift; 218} 219 220static s32 sx150x_write_cfg(struct sx150x_chip *chip, 221 u8 offset, u8 width, u8 reg, u8 val) 222{ 223 u8 mask; 224 u8 data; 225 u8 shift; 226 s32 err; 227 228 sx150x_find_cfg(offset, width, ®, &mask, &shift); 229 err = sx150x_i2c_read(chip->client, reg, &data); 230 if (err < 0) 231 return err; 232 233 data &= ~mask; 234 data |= (val << shift) & mask; 235 return sx150x_i2c_write(chip->client, reg, data); 236} 237 238static int sx150x_get_io(struct sx150x_chip *chip, unsigned offset) 239{ 240 u8 reg = chip->dev_cfg->reg_data; 241 u8 mask; 242 u8 data; 243 u8 shift; 244 s32 err; 245 246 sx150x_find_cfg(offset, 1, ®, &mask, &shift); 247 err = sx150x_i2c_read(chip->client, reg, &data); 248 if (err >= 0) 249 err = (data & mask) != 0 ? 1 : 0; 250 251 return err; 252} 253 254static void sx150x_set_oscio(struct sx150x_chip *chip, int val) 255{ 256 sx150x_i2c_write(chip->client, 257 chip->dev_cfg->pri.x789.reg_clock, 258 (val ? 0x1f : 0x10)); 259} 260 261static void sx150x_set_io(struct sx150x_chip *chip, unsigned offset, int val) 262{ 263 sx150x_write_cfg(chip, 264 offset, 265 1, 266 chip->dev_cfg->reg_data, 267 (val ? 1 : 0)); 268} 269 270static int sx150x_io_input(struct sx150x_chip *chip, unsigned offset) 271{ 272 return sx150x_write_cfg(chip, 273 offset, 274 1, 275 chip->dev_cfg->reg_dir, 276 1); 277} 278 279static int sx150x_io_output(struct sx150x_chip *chip, unsigned offset, int val) 280{ 281 int err; 282 283 err = sx150x_write_cfg(chip, 284 offset, 285 1, 286 chip->dev_cfg->reg_data, 287 (val ? 1 : 0)); 288 if (err >= 0) 289 err = sx150x_write_cfg(chip, 290 offset, 291 1, 292 chip->dev_cfg->reg_dir, 293 0); 294 return err; 295} 296 297static int sx150x_gpio_get(struct gpio_chip *gc, unsigned offset) 298{ 299 struct sx150x_chip *chip; 300 int status = -EINVAL; 301 302 chip = container_of(gc, struct sx150x_chip, gpio_chip); 303 304 if (!offset_is_oscio(chip, offset)) { 305 mutex_lock(&chip->lock); 306 status = sx150x_get_io(chip, offset); 307 mutex_unlock(&chip->lock); 308 } 309 310 return status; 311} 312 313static void sx150x_gpio_set(struct gpio_chip *gc, unsigned offset, int val) 314{ 315 struct sx150x_chip *chip; 316 317 chip = container_of(gc, struct sx150x_chip, gpio_chip); 318 319 mutex_lock(&chip->lock); 320 if (offset_is_oscio(chip, offset)) 321 sx150x_set_oscio(chip, val); 322 else 323 sx150x_set_io(chip, offset, val); 324 mutex_unlock(&chip->lock); 325} 326 327static int sx150x_gpio_direction_input(struct gpio_chip *gc, unsigned offset) 328{ 329 struct sx150x_chip *chip; 330 int status = -EINVAL; 331 332 chip = container_of(gc, struct sx150x_chip, gpio_chip); 333 334 if (!offset_is_oscio(chip, offset)) { 335 mutex_lock(&chip->lock); 336 status = sx150x_io_input(chip, offset); 337 mutex_unlock(&chip->lock); 338 } 339 return status; 340} 341 342static int sx150x_gpio_direction_output(struct gpio_chip *gc, 343 unsigned offset, 344 int val) 345{ 346 struct sx150x_chip *chip; 347 int status = 0; 348 349 chip = container_of(gc, struct sx150x_chip, gpio_chip); 350 351 if (!offset_is_oscio(chip, offset)) { 352 mutex_lock(&chip->lock); 353 status = sx150x_io_output(chip, offset, val); 354 mutex_unlock(&chip->lock); 355 } 356 return status; 357} 358 359static void sx150x_irq_mask(struct irq_data *d) 360{ 361 struct sx150x_chip *chip = irq_data_get_irq_chip_data(d); 362 unsigned n = d->hwirq; 363 364 chip->irq_masked |= (1 << n); 365 chip->irq_update = n; 366} 367 368static void sx150x_irq_unmask(struct irq_data *d) 369{ 370 struct sx150x_chip *chip = irq_data_get_irq_chip_data(d); 371 unsigned n = d->hwirq; 372 373 chip->irq_masked &= ~(1 << n); 374 chip->irq_update = n; 375} 376 377static int sx150x_irq_set_type(struct irq_data *d, unsigned int flow_type) 378{ 379 struct sx150x_chip *chip = irq_data_get_irq_chip_data(d); 380 unsigned n, val = 0; 381 382 if (flow_type & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) 383 return -EINVAL; 384 385 n = d->hwirq; 386 387 if (flow_type & IRQ_TYPE_EDGE_RISING) 388 val |= 0x1; 389 if (flow_type & IRQ_TYPE_EDGE_FALLING) 390 val |= 0x2; 391 392 chip->irq_sense &= ~(3UL << (n * 2)); 393 chip->irq_sense |= val << (n * 2); 394 chip->irq_update = n; 395 return 0; 396} 397 398static irqreturn_t sx150x_irq_thread_fn(int irq, void *dev_id) 399{ 400 struct sx150x_chip *chip = (struct sx150x_chip *)dev_id; 401 unsigned nhandled = 0; 402 unsigned sub_irq; 403 unsigned n; 404 s32 err; 405 u8 val; 406 int i; 407 408 for (i = (chip->dev_cfg->ngpios / 8) - 1; i >= 0; --i) { 409 err = sx150x_i2c_read(chip->client, 410 chip->dev_cfg->reg_irq_src - i, 411 &val); 412 if (err < 0) 413 continue; 414 415 sx150x_i2c_write(chip->client, 416 chip->dev_cfg->reg_irq_src - i, 417 val); 418 for (n = 0; n < 8; ++n) { 419 if (val & (1 << n)) { 420 sub_irq = irq_find_mapping( 421 chip->gpio_chip.irqdomain, 422 (i * 8) + n); 423 handle_nested_irq(sub_irq); 424 ++nhandled; 425 } 426 } 427 } 428 429 return (nhandled > 0 ? IRQ_HANDLED : IRQ_NONE); 430} 431 432static void sx150x_irq_bus_lock(struct irq_data *d) 433{ 434 struct sx150x_chip *chip = irq_data_get_irq_chip_data(d); 435 436 mutex_lock(&chip->lock); 437} 438 439static void sx150x_irq_bus_sync_unlock(struct irq_data *d) 440{ 441 struct sx150x_chip *chip = irq_data_get_irq_chip_data(d); 442 unsigned n; 443 444 if (chip->irq_update == NO_UPDATE_PENDING) 445 goto out; 446 447 n = chip->irq_update; 448 chip->irq_update = NO_UPDATE_PENDING; 449 450 /* Avoid updates if nothing changed */ 451 if (chip->dev_sense == chip->irq_sense && 452 chip->dev_masked == chip->irq_masked) 453 goto out; 454 455 chip->dev_sense = chip->irq_sense; 456 chip->dev_masked = chip->irq_masked; 457 458 if (chip->irq_masked & (1 << n)) { 459 sx150x_write_cfg(chip, n, 1, chip->dev_cfg->reg_irq_mask, 1); 460 sx150x_write_cfg(chip, n, 2, chip->dev_cfg->reg_sense, 0); 461 } else { 462 sx150x_write_cfg(chip, n, 1, chip->dev_cfg->reg_irq_mask, 0); 463 sx150x_write_cfg(chip, n, 2, chip->dev_cfg->reg_sense, 464 chip->irq_sense >> (n * 2)); 465 } 466out: 467 mutex_unlock(&chip->lock); 468} 469 470static void sx150x_init_chip(struct sx150x_chip *chip, 471 struct i2c_client *client, 472 kernel_ulong_t driver_data, 473 struct sx150x_platform_data *pdata) 474{ 475 mutex_init(&chip->lock); 476 477 chip->client = client; 478 chip->dev_cfg = &sx150x_devices[driver_data]; 479 chip->gpio_chip.dev = &client->dev; 480 chip->gpio_chip.label = client->name; 481 chip->gpio_chip.direction_input = sx150x_gpio_direction_input; 482 chip->gpio_chip.direction_output = sx150x_gpio_direction_output; 483 chip->gpio_chip.get = sx150x_gpio_get; 484 chip->gpio_chip.set = sx150x_gpio_set; 485 chip->gpio_chip.base = pdata->gpio_base; 486 chip->gpio_chip.can_sleep = true; 487 chip->gpio_chip.ngpio = chip->dev_cfg->ngpios; 488#ifdef CONFIG_OF_GPIO 489 chip->gpio_chip.of_node = client->dev.of_node; 490 chip->gpio_chip.of_gpio_n_cells = 2; 491#endif 492 if (pdata->oscio_is_gpo) 493 ++chip->gpio_chip.ngpio; 494 495 chip->irq_chip.name = client->name; 496 chip->irq_chip.irq_mask = sx150x_irq_mask; 497 chip->irq_chip.irq_unmask = sx150x_irq_unmask; 498 chip->irq_chip.irq_set_type = sx150x_irq_set_type; 499 chip->irq_chip.irq_bus_lock = sx150x_irq_bus_lock; 500 chip->irq_chip.irq_bus_sync_unlock = sx150x_irq_bus_sync_unlock; 501 chip->irq_summary = -1; 502 chip->irq_base = -1; 503 chip->irq_masked = ~0; 504 chip->irq_sense = 0; 505 chip->dev_masked = ~0; 506 chip->dev_sense = 0; 507 chip->irq_update = NO_UPDATE_PENDING; 508} 509 510static int sx150x_init_io(struct sx150x_chip *chip, u8 base, u16 cfg) 511{ 512 int err = 0; 513 unsigned n; 514 515 for (n = 0; err >= 0 && n < (chip->dev_cfg->ngpios / 8); ++n) 516 err = sx150x_i2c_write(chip->client, base - n, cfg >> (n * 8)); 517 return err; 518} 519 520static int sx150x_reset(struct sx150x_chip *chip) 521{ 522 int err; 523 524 err = i2c_smbus_write_byte_data(chip->client, 525 chip->dev_cfg->pri.x789.reg_reset, 526 0x12); 527 if (err < 0) 528 return err; 529 530 err = i2c_smbus_write_byte_data(chip->client, 531 chip->dev_cfg->pri.x789.reg_reset, 532 0x34); 533 return err; 534} 535 536static int sx150x_init_hw(struct sx150x_chip *chip, 537 struct sx150x_platform_data *pdata) 538{ 539 int err = 0; 540 541 if (pdata->reset_during_probe) { 542 err = sx150x_reset(chip); 543 if (err < 0) 544 return err; 545 } 546 547 if (chip->dev_cfg->model == SX150X_789) 548 err = sx150x_i2c_write(chip->client, 549 chip->dev_cfg->pri.x789.reg_misc, 550 0x01); 551 else 552 err = sx150x_i2c_write(chip->client, 553 chip->dev_cfg->pri.x456.reg_advance, 554 0x04); 555 if (err < 0) 556 return err; 557 558 err = sx150x_init_io(chip, chip->dev_cfg->reg_pullup, 559 pdata->io_pullup_ena); 560 if (err < 0) 561 return err; 562 563 err = sx150x_init_io(chip, chip->dev_cfg->reg_pulldn, 564 pdata->io_pulldn_ena); 565 if (err < 0) 566 return err; 567 568 if (chip->dev_cfg->model == SX150X_789) { 569 err = sx150x_init_io(chip, 570 chip->dev_cfg->pri.x789.reg_drain, 571 pdata->io_open_drain_ena); 572 if (err < 0) 573 return err; 574 575 err = sx150x_init_io(chip, 576 chip->dev_cfg->pri.x789.reg_polarity, 577 pdata->io_polarity); 578 if (err < 0) 579 return err; 580 } else { 581 /* Set all pins to work in normal mode */ 582 err = sx150x_init_io(chip, 583 chip->dev_cfg->pri.x456.reg_pld_mode, 584 0); 585 if (err < 0) 586 return err; 587 } 588 589 590 if (pdata->oscio_is_gpo) 591 sx150x_set_oscio(chip, 0); 592 593 return err; 594} 595 596static int sx150x_install_irq_chip(struct sx150x_chip *chip, 597 int irq_summary, 598 int irq_base) 599{ 600 int err; 601 602 chip->irq_summary = irq_summary; 603 chip->irq_base = irq_base; 604 605 /* Add gpio chip to irq subsystem */ 606 err = gpiochip_irqchip_add(&chip->gpio_chip, 607 &chip->irq_chip, chip->irq_base, 608 handle_edge_irq, IRQ_TYPE_EDGE_BOTH); 609 if (err) { 610 dev_err(&chip->client->dev, 611 "could not connect irqchip to gpiochip\n"); 612 return err; 613 } 614 615 err = devm_request_threaded_irq(&chip->client->dev, 616 irq_summary, NULL, sx150x_irq_thread_fn, 617 IRQF_ONESHOT | IRQF_SHARED | IRQF_TRIGGER_FALLING, 618 chip->irq_chip.name, chip); 619 if (err < 0) { 620 chip->irq_summary = -1; 621 chip->irq_base = -1; 622 } 623 624 return err; 625} 626 627static int sx150x_probe(struct i2c_client *client, 628 const struct i2c_device_id *id) 629{ 630 static const u32 i2c_funcs = I2C_FUNC_SMBUS_BYTE_DATA | 631 I2C_FUNC_SMBUS_WRITE_WORD_DATA; 632 struct sx150x_platform_data *pdata; 633 struct sx150x_chip *chip; 634 int rc; 635 636 pdata = dev_get_platdata(&client->dev); 637 if (!pdata) 638 return -EINVAL; 639 640 if (!i2c_check_functionality(client->adapter, i2c_funcs)) 641 return -ENOSYS; 642 643 chip = devm_kzalloc(&client->dev, 644 sizeof(struct sx150x_chip), GFP_KERNEL); 645 if (!chip) 646 return -ENOMEM; 647 648 sx150x_init_chip(chip, client, id->driver_data, pdata); 649 rc = sx150x_init_hw(chip, pdata); 650 if (rc < 0) 651 return rc; 652 653 rc = gpiochip_add(&chip->gpio_chip); 654 if (rc) 655 return rc; 656 657 if (pdata->irq_summary >= 0) { 658 rc = sx150x_install_irq_chip(chip, 659 pdata->irq_summary, 660 pdata->irq_base); 661 if (rc < 0) 662 goto probe_fail_post_gpiochip_add; 663 } 664 665 i2c_set_clientdata(client, chip); 666 667 return 0; 668probe_fail_post_gpiochip_add: 669 gpiochip_remove(&chip->gpio_chip); 670 return rc; 671} 672 673static int sx150x_remove(struct i2c_client *client) 674{ 675 struct sx150x_chip *chip; 676 677 chip = i2c_get_clientdata(client); 678 gpiochip_remove(&chip->gpio_chip); 679 680 return 0; 681} 682 683static struct i2c_driver sx150x_driver = { 684 .driver = { 685 .name = "sx150x", 686 .owner = THIS_MODULE, 687 .of_match_table = of_match_ptr(sx150x_of_match), 688 }, 689 .probe = sx150x_probe, 690 .remove = sx150x_remove, 691 .id_table = sx150x_id, 692}; 693 694static int __init sx150x_init(void) 695{ 696 return i2c_add_driver(&sx150x_driver); 697} 698subsys_initcall(sx150x_init); 699 700static void __exit sx150x_exit(void) 701{ 702 return i2c_del_driver(&sx150x_driver); 703} 704module_exit(sx150x_exit); 705 706MODULE_AUTHOR("Gregory Bean <gbean@codeaurora.org>"); 707MODULE_DESCRIPTION("Driver for Semtech SX150X I2C GPIO Expanders"); 708MODULE_LICENSE("GPL v2"); 709MODULE_ALIAS("i2c:sx150x"); 710