1/* 2 * PCA953x 4/8/16/24/40 bit I/O ports 3 * 4 * Copyright (C) 2005 Ben Gardner <bgardner@wabtec.com> 5 * Copyright (C) 2007 Marvell International Ltd. 6 * 7 * Derived from drivers/i2c/chips/pca9539.c 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License as published by 11 * the Free Software Foundation; version 2 of the License. 12 */ 13 14#include <linux/module.h> 15#include <linux/init.h> 16#include <linux/gpio.h> 17#include <linux/interrupt.h> 18#include <linux/i2c.h> 19#include <linux/platform_data/pca953x.h> 20#include <linux/slab.h> 21#ifdef CONFIG_OF_GPIO 22#include <linux/of_platform.h> 23#endif 24#include <asm/unaligned.h> 25 26#define PCA953X_INPUT 0 27#define PCA953X_OUTPUT 1 28#define PCA953X_INVERT 2 29#define PCA953X_DIRECTION 3 30 31#define REG_ADDR_AI 0x80 32 33#define PCA957X_IN 0 34#define PCA957X_INVRT 1 35#define PCA957X_BKEN 2 36#define PCA957X_PUPD 3 37#define PCA957X_CFG 4 38#define PCA957X_OUT 5 39#define PCA957X_MSK 6 40#define PCA957X_INTS 7 41 42#define PCA_GPIO_MASK 0x00FF 43#define PCA_INT 0x0100 44#define PCA953X_TYPE 0x1000 45#define PCA957X_TYPE 0x2000 46 47static const struct i2c_device_id pca953x_id[] = { 48 { "pca9505", 40 | PCA953X_TYPE | PCA_INT, }, 49 { "pca9534", 8 | PCA953X_TYPE | PCA_INT, }, 50 { "pca9535", 16 | PCA953X_TYPE | PCA_INT, }, 51 { "pca9536", 4 | PCA953X_TYPE, }, 52 { "pca9537", 4 | PCA953X_TYPE | PCA_INT, }, 53 { "pca9538", 8 | PCA953X_TYPE | PCA_INT, }, 54 { "pca9539", 16 | PCA953X_TYPE | PCA_INT, }, 55 { "pca9554", 8 | PCA953X_TYPE | PCA_INT, }, 56 { "pca9555", 16 | PCA953X_TYPE | PCA_INT, }, 57 { "pca9556", 8 | PCA953X_TYPE, }, 58 { "pca9557", 8 | PCA953X_TYPE, }, 59 { "pca9574", 8 | PCA957X_TYPE | PCA_INT, }, 60 { "pca9575", 16 | PCA957X_TYPE | PCA_INT, }, 61 { "pca9698", 40 | PCA953X_TYPE, }, 62 63 { "max7310", 8 | PCA953X_TYPE, }, 64 { "max7312", 16 | PCA953X_TYPE | PCA_INT, }, 65 { "max7313", 16 | PCA953X_TYPE | PCA_INT, }, 66 { "max7315", 8 | PCA953X_TYPE | PCA_INT, }, 67 { "pca6107", 8 | PCA953X_TYPE | PCA_INT, }, 68 { "tca6408", 8 | PCA953X_TYPE | PCA_INT, }, 69 { "tca6416", 16 | PCA953X_TYPE | PCA_INT, }, 70 { "tca6424", 24 | PCA953X_TYPE | PCA_INT, }, 71 { "xra1202", 8 | PCA953X_TYPE }, 72 { } 73}; 74MODULE_DEVICE_TABLE(i2c, pca953x_id); 75 76#define MAX_BANK 5 77#define BANK_SZ 8 78 79#define NBANK(chip) (chip->gpio_chip.ngpio / BANK_SZ) 80 81struct pca953x_chip { 82 unsigned gpio_start; 83 u8 reg_output[MAX_BANK]; 84 u8 reg_direction[MAX_BANK]; 85 struct mutex i2c_lock; 86 87#ifdef CONFIG_GPIO_PCA953X_IRQ 88 struct mutex irq_lock; 89 u8 irq_mask[MAX_BANK]; 90 u8 irq_stat[MAX_BANK]; 91 u8 irq_trig_raise[MAX_BANK]; 92 u8 irq_trig_fall[MAX_BANK]; 93#endif 94 95 struct i2c_client *client; 96 struct gpio_chip gpio_chip; 97 const char *const *names; 98 int chip_type; 99}; 100 101static inline struct pca953x_chip *to_pca(struct gpio_chip *gc) 102{ 103 return container_of(gc, struct pca953x_chip, gpio_chip); 104} 105 106static int pca953x_read_single(struct pca953x_chip *chip, int reg, u32 *val, 107 int off) 108{ 109 int ret; 110 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); 111 int offset = off / BANK_SZ; 112 113 ret = i2c_smbus_read_byte_data(chip->client, 114 (reg << bank_shift) + offset); 115 *val = ret; 116 117 if (ret < 0) { 118 dev_err(&chip->client->dev, "failed reading register\n"); 119 return ret; 120 } 121 122 return 0; 123} 124 125static int pca953x_write_single(struct pca953x_chip *chip, int reg, u32 val, 126 int off) 127{ 128 int ret = 0; 129 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); 130 int offset = off / BANK_SZ; 131 132 ret = i2c_smbus_write_byte_data(chip->client, 133 (reg << bank_shift) + offset, val); 134 135 if (ret < 0) { 136 dev_err(&chip->client->dev, "failed writing register\n"); 137 return ret; 138 } 139 140 return 0; 141} 142 143static int pca953x_write_regs(struct pca953x_chip *chip, int reg, u8 *val) 144{ 145 int ret = 0; 146 147 if (chip->gpio_chip.ngpio <= 8) 148 ret = i2c_smbus_write_byte_data(chip->client, reg, *val); 149 else if (chip->gpio_chip.ngpio >= 24) { 150 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); 151 ret = i2c_smbus_write_i2c_block_data(chip->client, 152 (reg << bank_shift) | REG_ADDR_AI, 153 NBANK(chip), val); 154 } else { 155 switch (chip->chip_type) { 156 case PCA953X_TYPE: 157 ret = i2c_smbus_write_word_data(chip->client, 158 reg << 1, cpu_to_le16(get_unaligned((u16 *)val))); 159 break; 160 case PCA957X_TYPE: 161 ret = i2c_smbus_write_byte_data(chip->client, reg << 1, 162 val[0]); 163 if (ret < 0) 164 break; 165 ret = i2c_smbus_write_byte_data(chip->client, 166 (reg << 1) + 1, 167 val[1]); 168 break; 169 } 170 } 171 172 if (ret < 0) { 173 dev_err(&chip->client->dev, "failed writing register\n"); 174 return ret; 175 } 176 177 return 0; 178} 179 180static int pca953x_read_regs(struct pca953x_chip *chip, int reg, u8 *val) 181{ 182 int ret; 183 184 if (chip->gpio_chip.ngpio <= 8) { 185 ret = i2c_smbus_read_byte_data(chip->client, reg); 186 *val = ret; 187 } else if (chip->gpio_chip.ngpio >= 24) { 188 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); 189 190 ret = i2c_smbus_read_i2c_block_data(chip->client, 191 (reg << bank_shift) | REG_ADDR_AI, 192 NBANK(chip), val); 193 } else { 194 ret = i2c_smbus_read_word_data(chip->client, reg << 1); 195 val[0] = (u16)ret & 0xFF; 196 val[1] = (u16)ret >> 8; 197 } 198 if (ret < 0) { 199 dev_err(&chip->client->dev, "failed reading register\n"); 200 return ret; 201 } 202 203 return 0; 204} 205 206static int pca953x_gpio_direction_input(struct gpio_chip *gc, unsigned off) 207{ 208 struct pca953x_chip *chip = to_pca(gc); 209 u8 reg_val; 210 int ret, offset = 0; 211 212 mutex_lock(&chip->i2c_lock); 213 reg_val = chip->reg_direction[off / BANK_SZ] | (1u << (off % BANK_SZ)); 214 215 switch (chip->chip_type) { 216 case PCA953X_TYPE: 217 offset = PCA953X_DIRECTION; 218 break; 219 case PCA957X_TYPE: 220 offset = PCA957X_CFG; 221 break; 222 } 223 ret = pca953x_write_single(chip, offset, reg_val, off); 224 if (ret) 225 goto exit; 226 227 chip->reg_direction[off / BANK_SZ] = reg_val; 228 ret = 0; 229exit: 230 mutex_unlock(&chip->i2c_lock); 231 return ret; 232} 233 234static int pca953x_gpio_direction_output(struct gpio_chip *gc, 235 unsigned off, int val) 236{ 237 struct pca953x_chip *chip = to_pca(gc); 238 u8 reg_val; 239 int ret, offset = 0; 240 241 mutex_lock(&chip->i2c_lock); 242 /* set output level */ 243 if (val) 244 reg_val = chip->reg_output[off / BANK_SZ] 245 | (1u << (off % BANK_SZ)); 246 else 247 reg_val = chip->reg_output[off / BANK_SZ] 248 & ~(1u << (off % BANK_SZ)); 249 250 switch (chip->chip_type) { 251 case PCA953X_TYPE: 252 offset = PCA953X_OUTPUT; 253 break; 254 case PCA957X_TYPE: 255 offset = PCA957X_OUT; 256 break; 257 } 258 ret = pca953x_write_single(chip, offset, reg_val, off); 259 if (ret) 260 goto exit; 261 262 chip->reg_output[off / BANK_SZ] = reg_val; 263 264 /* then direction */ 265 reg_val = chip->reg_direction[off / BANK_SZ] & ~(1u << (off % BANK_SZ)); 266 switch (chip->chip_type) { 267 case PCA953X_TYPE: 268 offset = PCA953X_DIRECTION; 269 break; 270 case PCA957X_TYPE: 271 offset = PCA957X_CFG; 272 break; 273 } 274 ret = pca953x_write_single(chip, offset, reg_val, off); 275 if (ret) 276 goto exit; 277 278 chip->reg_direction[off / BANK_SZ] = reg_val; 279 ret = 0; 280exit: 281 mutex_unlock(&chip->i2c_lock); 282 return ret; 283} 284 285static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off) 286{ 287 struct pca953x_chip *chip = to_pca(gc); 288 u32 reg_val; 289 int ret, offset = 0; 290 291 mutex_lock(&chip->i2c_lock); 292 switch (chip->chip_type) { 293 case PCA953X_TYPE: 294 offset = PCA953X_INPUT; 295 break; 296 case PCA957X_TYPE: 297 offset = PCA957X_IN; 298 break; 299 } 300 ret = pca953x_read_single(chip, offset, ®_val, off); 301 mutex_unlock(&chip->i2c_lock); 302 if (ret < 0) { 303 /* NOTE: diagnostic already emitted; that's all we should 304 * do unless gpio_*_value_cansleep() calls become different 305 * from their nonsleeping siblings (and report faults). 306 */ 307 return 0; 308 } 309 310 return (reg_val & (1u << (off % BANK_SZ))) ? 1 : 0; 311} 312 313static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val) 314{ 315 struct pca953x_chip *chip = to_pca(gc); 316 u8 reg_val; 317 int ret, offset = 0; 318 319 mutex_lock(&chip->i2c_lock); 320 if (val) 321 reg_val = chip->reg_output[off / BANK_SZ] 322 | (1u << (off % BANK_SZ)); 323 else 324 reg_val = chip->reg_output[off / BANK_SZ] 325 & ~(1u << (off % BANK_SZ)); 326 327 switch (chip->chip_type) { 328 case PCA953X_TYPE: 329 offset = PCA953X_OUTPUT; 330 break; 331 case PCA957X_TYPE: 332 offset = PCA957X_OUT; 333 break; 334 } 335 ret = pca953x_write_single(chip, offset, reg_val, off); 336 if (ret) 337 goto exit; 338 339 chip->reg_output[off / BANK_SZ] = reg_val; 340exit: 341 mutex_unlock(&chip->i2c_lock); 342} 343 344static void pca953x_setup_gpio(struct pca953x_chip *chip, int gpios) 345{ 346 struct gpio_chip *gc; 347 348 gc = &chip->gpio_chip; 349 350 gc->direction_input = pca953x_gpio_direction_input; 351 gc->direction_output = pca953x_gpio_direction_output; 352 gc->get = pca953x_gpio_get_value; 353 gc->set = pca953x_gpio_set_value; 354 gc->can_sleep = true; 355 356 gc->base = chip->gpio_start; 357 gc->ngpio = gpios; 358 gc->label = chip->client->name; 359 gc->dev = &chip->client->dev; 360 gc->owner = THIS_MODULE; 361 gc->names = chip->names; 362} 363 364#ifdef CONFIG_GPIO_PCA953X_IRQ 365static void pca953x_irq_mask(struct irq_data *d) 366{ 367 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 368 struct pca953x_chip *chip = to_pca(gc); 369 370 chip->irq_mask[d->hwirq / BANK_SZ] &= ~(1 << (d->hwirq % BANK_SZ)); 371} 372 373static void pca953x_irq_unmask(struct irq_data *d) 374{ 375 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 376 struct pca953x_chip *chip = to_pca(gc); 377 378 chip->irq_mask[d->hwirq / BANK_SZ] |= 1 << (d->hwirq % BANK_SZ); 379} 380 381static void pca953x_irq_bus_lock(struct irq_data *d) 382{ 383 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 384 struct pca953x_chip *chip = to_pca(gc); 385 386 mutex_lock(&chip->irq_lock); 387} 388 389static void pca953x_irq_bus_sync_unlock(struct irq_data *d) 390{ 391 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 392 struct pca953x_chip *chip = to_pca(gc); 393 u8 new_irqs; 394 int level, i; 395 396 /* Look for any newly setup interrupt */ 397 for (i = 0; i < NBANK(chip); i++) { 398 new_irqs = chip->irq_trig_fall[i] | chip->irq_trig_raise[i]; 399 new_irqs &= ~chip->reg_direction[i]; 400 401 while (new_irqs) { 402 level = __ffs(new_irqs); 403 pca953x_gpio_direction_input(&chip->gpio_chip, 404 level + (BANK_SZ * i)); 405 new_irqs &= ~(1 << level); 406 } 407 } 408 409 mutex_unlock(&chip->irq_lock); 410} 411 412static int pca953x_irq_set_type(struct irq_data *d, unsigned int type) 413{ 414 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 415 struct pca953x_chip *chip = to_pca(gc); 416 int bank_nb = d->hwirq / BANK_SZ; 417 u8 mask = 1 << (d->hwirq % BANK_SZ); 418 419 if (!(type & IRQ_TYPE_EDGE_BOTH)) { 420 dev_err(&chip->client->dev, "irq %d: unsupported type %d\n", 421 d->irq, type); 422 return -EINVAL; 423 } 424 425 if (type & IRQ_TYPE_EDGE_FALLING) 426 chip->irq_trig_fall[bank_nb] |= mask; 427 else 428 chip->irq_trig_fall[bank_nb] &= ~mask; 429 430 if (type & IRQ_TYPE_EDGE_RISING) 431 chip->irq_trig_raise[bank_nb] |= mask; 432 else 433 chip->irq_trig_raise[bank_nb] &= ~mask; 434 435 return 0; 436} 437 438static struct irq_chip pca953x_irq_chip = { 439 .name = "pca953x", 440 .irq_mask = pca953x_irq_mask, 441 .irq_unmask = pca953x_irq_unmask, 442 .irq_bus_lock = pca953x_irq_bus_lock, 443 .irq_bus_sync_unlock = pca953x_irq_bus_sync_unlock, 444 .irq_set_type = pca953x_irq_set_type, 445}; 446 447static u8 pca953x_irq_pending(struct pca953x_chip *chip, u8 *pending) 448{ 449 u8 cur_stat[MAX_BANK]; 450 u8 old_stat[MAX_BANK]; 451 u8 pendings = 0; 452 u8 trigger[MAX_BANK], triggers = 0; 453 int ret, i, offset = 0; 454 455 switch (chip->chip_type) { 456 case PCA953X_TYPE: 457 offset = PCA953X_INPUT; 458 break; 459 case PCA957X_TYPE: 460 offset = PCA957X_IN; 461 break; 462 } 463 ret = pca953x_read_regs(chip, offset, cur_stat); 464 if (ret) 465 return 0; 466 467 /* Remove output pins from the equation */ 468 for (i = 0; i < NBANK(chip); i++) 469 cur_stat[i] &= chip->reg_direction[i]; 470 471 memcpy(old_stat, chip->irq_stat, NBANK(chip)); 472 473 for (i = 0; i < NBANK(chip); i++) { 474 trigger[i] = (cur_stat[i] ^ old_stat[i]) & chip->irq_mask[i]; 475 triggers += trigger[i]; 476 } 477 478 if (!triggers) 479 return 0; 480 481 memcpy(chip->irq_stat, cur_stat, NBANK(chip)); 482 483 for (i = 0; i < NBANK(chip); i++) { 484 pending[i] = (old_stat[i] & chip->irq_trig_fall[i]) | 485 (cur_stat[i] & chip->irq_trig_raise[i]); 486 pending[i] &= trigger[i]; 487 pendings += pending[i]; 488 } 489 490 return pendings; 491} 492 493static irqreturn_t pca953x_irq_handler(int irq, void *devid) 494{ 495 struct pca953x_chip *chip = devid; 496 u8 pending[MAX_BANK]; 497 u8 level; 498 unsigned nhandled = 0; 499 int i; 500 501 if (!pca953x_irq_pending(chip, pending)) 502 return IRQ_NONE; 503 504 for (i = 0; i < NBANK(chip); i++) { 505 while (pending[i]) { 506 level = __ffs(pending[i]); 507 handle_nested_irq(irq_find_mapping(chip->gpio_chip.irqdomain, 508 level + (BANK_SZ * i))); 509 pending[i] &= ~(1 << level); 510 nhandled++; 511 } 512 } 513 514 return (nhandled > 0) ? IRQ_HANDLED : IRQ_NONE; 515} 516 517static int pca953x_irq_setup(struct pca953x_chip *chip, 518 const struct i2c_device_id *id, 519 int irq_base) 520{ 521 struct i2c_client *client = chip->client; 522 int ret, i, offset = 0; 523 524 if (client->irq && irq_base != -1 525 && (id->driver_data & PCA_INT)) { 526 527 switch (chip->chip_type) { 528 case PCA953X_TYPE: 529 offset = PCA953X_INPUT; 530 break; 531 case PCA957X_TYPE: 532 offset = PCA957X_IN; 533 break; 534 } 535 ret = pca953x_read_regs(chip, offset, chip->irq_stat); 536 if (ret) 537 return ret; 538 539 /* 540 * There is no way to know which GPIO line generated the 541 * interrupt. We have to rely on the previous read for 542 * this purpose. 543 */ 544 for (i = 0; i < NBANK(chip); i++) 545 chip->irq_stat[i] &= chip->reg_direction[i]; 546 mutex_init(&chip->irq_lock); 547 548 ret = devm_request_threaded_irq(&client->dev, 549 client->irq, 550 NULL, 551 pca953x_irq_handler, 552 IRQF_TRIGGER_LOW | IRQF_ONESHOT | 553 IRQF_SHARED, 554 dev_name(&client->dev), chip); 555 if (ret) { 556 dev_err(&client->dev, "failed to request irq %d\n", 557 client->irq); 558 return ret; 559 } 560 561 ret = gpiochip_irqchip_add(&chip->gpio_chip, 562 &pca953x_irq_chip, 563 irq_base, 564 handle_simple_irq, 565 IRQ_TYPE_NONE); 566 if (ret) { 567 dev_err(&client->dev, 568 "could not connect irqchip to gpiochip\n"); 569 return ret; 570 } 571 } 572 573 return 0; 574} 575 576#else /* CONFIG_GPIO_PCA953X_IRQ */ 577static int pca953x_irq_setup(struct pca953x_chip *chip, 578 const struct i2c_device_id *id, 579 int irq_base) 580{ 581 struct i2c_client *client = chip->client; 582 583 if (irq_base != -1 && (id->driver_data & PCA_INT)) 584 dev_warn(&client->dev, "interrupt support not compiled in\n"); 585 586 return 0; 587} 588#endif 589 590static int device_pca953x_init(struct pca953x_chip *chip, u32 invert) 591{ 592 int ret; 593 u8 val[MAX_BANK]; 594 595 ret = pca953x_read_regs(chip, PCA953X_OUTPUT, chip->reg_output); 596 if (ret) 597 goto out; 598 599 ret = pca953x_read_regs(chip, PCA953X_DIRECTION, 600 chip->reg_direction); 601 if (ret) 602 goto out; 603 604 /* set platform specific polarity inversion */ 605 if (invert) 606 memset(val, 0xFF, NBANK(chip)); 607 else 608 memset(val, 0, NBANK(chip)); 609 610 ret = pca953x_write_regs(chip, PCA953X_INVERT, val); 611out: 612 return ret; 613} 614 615static int device_pca957x_init(struct pca953x_chip *chip, u32 invert) 616{ 617 int ret; 618 u8 val[MAX_BANK]; 619 620 ret = pca953x_read_regs(chip, PCA957X_OUT, chip->reg_output); 621 if (ret) 622 goto out; 623 ret = pca953x_read_regs(chip, PCA957X_CFG, chip->reg_direction); 624 if (ret) 625 goto out; 626 627 /* set platform specific polarity inversion */ 628 if (invert) 629 memset(val, 0xFF, NBANK(chip)); 630 else 631 memset(val, 0, NBANK(chip)); 632 pca953x_write_regs(chip, PCA957X_INVRT, val); 633 634 /* To enable register 6, 7 to controll pull up and pull down */ 635 memset(val, 0x02, NBANK(chip)); 636 pca953x_write_regs(chip, PCA957X_BKEN, val); 637 638 return 0; 639out: 640 return ret; 641} 642 643static int pca953x_probe(struct i2c_client *client, 644 const struct i2c_device_id *id) 645{ 646 struct pca953x_platform_data *pdata; 647 struct pca953x_chip *chip; 648 int irq_base = 0; 649 int ret; 650 u32 invert = 0; 651 652 chip = devm_kzalloc(&client->dev, 653 sizeof(struct pca953x_chip), GFP_KERNEL); 654 if (chip == NULL) 655 return -ENOMEM; 656 657 pdata = dev_get_platdata(&client->dev); 658 if (pdata) { 659 irq_base = pdata->irq_base; 660 chip->gpio_start = pdata->gpio_base; 661 invert = pdata->invert; 662 chip->names = pdata->names; 663 } else { 664 chip->gpio_start = -1; 665 irq_base = 0; 666 } 667 668 chip->client = client; 669 670 chip->chip_type = id->driver_data & (PCA953X_TYPE | PCA957X_TYPE); 671 672 mutex_init(&chip->i2c_lock); 673 674 /* initialize cached registers from their original values. 675 * we can't share this chip with another i2c master. 676 */ 677 pca953x_setup_gpio(chip, id->driver_data & PCA_GPIO_MASK); 678 679 if (chip->chip_type == PCA953X_TYPE) 680 ret = device_pca953x_init(chip, invert); 681 else 682 ret = device_pca957x_init(chip, invert); 683 if (ret) 684 return ret; 685 686 ret = gpiochip_add(&chip->gpio_chip); 687 if (ret) 688 return ret; 689 690 ret = pca953x_irq_setup(chip, id, irq_base); 691 if (ret) 692 return ret; 693 694 if (pdata && pdata->setup) { 695 ret = pdata->setup(client, chip->gpio_chip.base, 696 chip->gpio_chip.ngpio, pdata->context); 697 if (ret < 0) 698 dev_warn(&client->dev, "setup failed, %d\n", ret); 699 } 700 701 i2c_set_clientdata(client, chip); 702 return 0; 703} 704 705static int pca953x_remove(struct i2c_client *client) 706{ 707 struct pca953x_platform_data *pdata = dev_get_platdata(&client->dev); 708 struct pca953x_chip *chip = i2c_get_clientdata(client); 709 int ret = 0; 710 711 if (pdata && pdata->teardown) { 712 ret = pdata->teardown(client, chip->gpio_chip.base, 713 chip->gpio_chip.ngpio, pdata->context); 714 if (ret < 0) { 715 dev_err(&client->dev, "%s failed, %d\n", 716 "teardown", ret); 717 return ret; 718 } 719 } 720 721 gpiochip_remove(&chip->gpio_chip); 722 723 return 0; 724} 725 726static const struct of_device_id pca953x_dt_ids[] = { 727 { .compatible = "nxp,pca9505", }, 728 { .compatible = "nxp,pca9534", }, 729 { .compatible = "nxp,pca9535", }, 730 { .compatible = "nxp,pca9536", }, 731 { .compatible = "nxp,pca9537", }, 732 { .compatible = "nxp,pca9538", }, 733 { .compatible = "nxp,pca9539", }, 734 { .compatible = "nxp,pca9554", }, 735 { .compatible = "nxp,pca9555", }, 736 { .compatible = "nxp,pca9556", }, 737 { .compatible = "nxp,pca9557", }, 738 { .compatible = "nxp,pca9574", }, 739 { .compatible = "nxp,pca9575", }, 740 { .compatible = "nxp,pca9698", }, 741 742 { .compatible = "maxim,max7310", }, 743 { .compatible = "maxim,max7312", }, 744 { .compatible = "maxim,max7313", }, 745 { .compatible = "maxim,max7315", }, 746 747 { .compatible = "ti,pca6107", }, 748 { .compatible = "ti,tca6408", }, 749 { .compatible = "ti,tca6416", }, 750 { .compatible = "ti,tca6424", }, 751 752 { .compatible = "exar,xra1202", }, 753 { } 754}; 755 756MODULE_DEVICE_TABLE(of, pca953x_dt_ids); 757 758static struct i2c_driver pca953x_driver = { 759 .driver = { 760 .name = "pca953x", 761 .of_match_table = pca953x_dt_ids, 762 }, 763 .probe = pca953x_probe, 764 .remove = pca953x_remove, 765 .id_table = pca953x_id, 766}; 767 768static int __init pca953x_init(void) 769{ 770 return i2c_add_driver(&pca953x_driver); 771} 772/* register after i2c postcore initcall and before 773 * subsys initcalls that may rely on these GPIOs 774 */ 775subsys_initcall(pca953x_init); 776 777static void __exit pca953x_exit(void) 778{ 779 i2c_del_driver(&pca953x_driver); 780} 781module_exit(pca953x_exit); 782 783MODULE_AUTHOR("eric miao <eric.miao@marvell.com>"); 784MODULE_DESCRIPTION("GPIO expander driver for PCA953x"); 785MODULE_LICENSE("GPL"); 786