1/*
2 * Platform driver for the Synopsys DesignWare DMA Controller
3 *
4 * Copyright (C) 2007-2008 Atmel Corporation
5 * Copyright (C) 2010-2011 ST Microelectronics
6 * Copyright (C) 2013 Intel Corporation
7 *
8 * Some parts of this driver are derived from the original dw_dmac.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15#include <linux/module.h>
16#include <linux/device.h>
17#include <linux/clk.h>
18#include <linux/pm_runtime.h>
19#include <linux/platform_device.h>
20#include <linux/dmaengine.h>
21#include <linux/dma-mapping.h>
22#include <linux/of.h>
23#include <linux/of_dma.h>
24#include <linux/acpi.h>
25#include <linux/acpi_dma.h>
26
27#include "internal.h"
28
29#define DRV_NAME	"dw_dmac"
30
31static struct dma_chan *dw_dma_of_xlate(struct of_phandle_args *dma_spec,
32					struct of_dma *ofdma)
33{
34	struct dw_dma *dw = ofdma->of_dma_data;
35	struct dw_dma_slave slave = {
36		.dma_dev = dw->dma.dev,
37	};
38	dma_cap_mask_t cap;
39
40	if (dma_spec->args_count != 3)
41		return NULL;
42
43	slave.src_id = dma_spec->args[0];
44	slave.dst_id = dma_spec->args[0];
45	slave.src_master = dma_spec->args[1];
46	slave.dst_master = dma_spec->args[2];
47
48	if (WARN_ON(slave.src_id >= DW_DMA_MAX_NR_REQUESTS ||
49		    slave.dst_id >= DW_DMA_MAX_NR_REQUESTS ||
50		    slave.src_master >= dw->nr_masters ||
51		    slave.dst_master >= dw->nr_masters))
52		return NULL;
53
54	dma_cap_zero(cap);
55	dma_cap_set(DMA_SLAVE, cap);
56
57	/* TODO: there should be a simpler way to do this */
58	return dma_request_channel(cap, dw_dma_filter, &slave);
59}
60
61#ifdef CONFIG_ACPI
62static bool dw_dma_acpi_filter(struct dma_chan *chan, void *param)
63{
64	struct acpi_dma_spec *dma_spec = param;
65	struct dw_dma_slave slave = {
66		.dma_dev = dma_spec->dev,
67		.src_id = dma_spec->slave_id,
68		.dst_id = dma_spec->slave_id,
69		.src_master = 1,
70		.dst_master = 0,
71	};
72
73	return dw_dma_filter(chan, &slave);
74}
75
76static void dw_dma_acpi_controller_register(struct dw_dma *dw)
77{
78	struct device *dev = dw->dma.dev;
79	struct acpi_dma_filter_info *info;
80	int ret;
81
82	info = devm_kzalloc(dev, sizeof(*info), GFP_KERNEL);
83	if (!info)
84		return;
85
86	dma_cap_zero(info->dma_cap);
87	dma_cap_set(DMA_SLAVE, info->dma_cap);
88	info->filter_fn = dw_dma_acpi_filter;
89
90	ret = devm_acpi_dma_controller_register(dev, acpi_dma_simple_xlate,
91						info);
92	if (ret)
93		dev_err(dev, "could not register acpi_dma_controller\n");
94}
95#else /* !CONFIG_ACPI */
96static inline void dw_dma_acpi_controller_register(struct dw_dma *dw) {}
97#endif /* !CONFIG_ACPI */
98
99#ifdef CONFIG_OF
100static struct dw_dma_platform_data *
101dw_dma_parse_dt(struct platform_device *pdev)
102{
103	struct device_node *np = pdev->dev.of_node;
104	struct dw_dma_platform_data *pdata;
105	u32 tmp, arr[DW_DMA_MAX_NR_MASTERS];
106
107	if (!np) {
108		dev_err(&pdev->dev, "Missing DT data\n");
109		return NULL;
110	}
111
112	pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
113	if (!pdata)
114		return NULL;
115
116	if (of_property_read_u32(np, "dma-channels", &pdata->nr_channels))
117		return NULL;
118
119	if (of_property_read_bool(np, "is_private"))
120		pdata->is_private = true;
121
122	if (!of_property_read_u32(np, "chan_allocation_order", &tmp))
123		pdata->chan_allocation_order = (unsigned char)tmp;
124
125	if (!of_property_read_u32(np, "chan_priority", &tmp))
126		pdata->chan_priority = tmp;
127
128	if (!of_property_read_u32(np, "block_size", &tmp))
129		pdata->block_size = tmp;
130
131	if (!of_property_read_u32(np, "dma-masters", &tmp)) {
132		if (tmp > DW_DMA_MAX_NR_MASTERS)
133			return NULL;
134
135		pdata->nr_masters = tmp;
136	}
137
138	if (!of_property_read_u32_array(np, "data_width", arr,
139				pdata->nr_masters))
140		for (tmp = 0; tmp < pdata->nr_masters; tmp++)
141			pdata->data_width[tmp] = arr[tmp];
142
143	return pdata;
144}
145#else
146static inline struct dw_dma_platform_data *
147dw_dma_parse_dt(struct platform_device *pdev)
148{
149	return NULL;
150}
151#endif
152
153static int dw_probe(struct platform_device *pdev)
154{
155	struct dw_dma_chip *chip;
156	struct device *dev = &pdev->dev;
157	struct resource *mem;
158	struct dw_dma_platform_data *pdata;
159	int err;
160
161	chip = devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL);
162	if (!chip)
163		return -ENOMEM;
164
165	chip->irq = platform_get_irq(pdev, 0);
166	if (chip->irq < 0)
167		return chip->irq;
168
169	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
170	chip->regs = devm_ioremap_resource(dev, mem);
171	if (IS_ERR(chip->regs))
172		return PTR_ERR(chip->regs);
173
174	err = dma_coerce_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
175	if (err)
176		return err;
177
178	pdata = dev_get_platdata(dev);
179	if (!pdata)
180		pdata = dw_dma_parse_dt(pdev);
181
182	chip->dev = dev;
183
184	chip->clk = devm_clk_get(chip->dev, "hclk");
185	if (IS_ERR(chip->clk))
186		return PTR_ERR(chip->clk);
187	err = clk_prepare_enable(chip->clk);
188	if (err)
189		return err;
190
191	pm_runtime_enable(&pdev->dev);
192
193	err = dw_dma_probe(chip, pdata);
194	if (err)
195		goto err_dw_dma_probe;
196
197	platform_set_drvdata(pdev, chip);
198
199	if (pdev->dev.of_node) {
200		err = of_dma_controller_register(pdev->dev.of_node,
201						 dw_dma_of_xlate, chip->dw);
202		if (err)
203			dev_err(&pdev->dev,
204				"could not register of_dma_controller\n");
205	}
206
207	if (ACPI_HANDLE(&pdev->dev))
208		dw_dma_acpi_controller_register(chip->dw);
209
210	return 0;
211
212err_dw_dma_probe:
213	pm_runtime_disable(&pdev->dev);
214	clk_disable_unprepare(chip->clk);
215	return err;
216}
217
218static int dw_remove(struct platform_device *pdev)
219{
220	struct dw_dma_chip *chip = platform_get_drvdata(pdev);
221
222	if (pdev->dev.of_node)
223		of_dma_controller_free(pdev->dev.of_node);
224
225	dw_dma_remove(chip);
226	pm_runtime_disable(&pdev->dev);
227	clk_disable_unprepare(chip->clk);
228
229	return 0;
230}
231
232static void dw_shutdown(struct platform_device *pdev)
233{
234	struct dw_dma_chip *chip = platform_get_drvdata(pdev);
235
236	dw_dma_disable(chip);
237	clk_disable_unprepare(chip->clk);
238}
239
240#ifdef CONFIG_OF
241static const struct of_device_id dw_dma_of_id_table[] = {
242	{ .compatible = "snps,dma-spear1340" },
243	{}
244};
245MODULE_DEVICE_TABLE(of, dw_dma_of_id_table);
246#endif
247
248#ifdef CONFIG_ACPI
249static const struct acpi_device_id dw_dma_acpi_id_table[] = {
250	{ "INTL9C60", 0 },
251	{ }
252};
253MODULE_DEVICE_TABLE(acpi, dw_dma_acpi_id_table);
254#endif
255
256#ifdef CONFIG_PM_SLEEP
257
258static int dw_suspend_late(struct device *dev)
259{
260	struct platform_device *pdev = to_platform_device(dev);
261	struct dw_dma_chip *chip = platform_get_drvdata(pdev);
262
263	dw_dma_disable(chip);
264	clk_disable_unprepare(chip->clk);
265
266	return 0;
267}
268
269static int dw_resume_early(struct device *dev)
270{
271	struct platform_device *pdev = to_platform_device(dev);
272	struct dw_dma_chip *chip = platform_get_drvdata(pdev);
273
274	clk_prepare_enable(chip->clk);
275	return dw_dma_enable(chip);
276}
277
278#endif /* CONFIG_PM_SLEEP */
279
280static const struct dev_pm_ops dw_dev_pm_ops = {
281	SET_LATE_SYSTEM_SLEEP_PM_OPS(dw_suspend_late, dw_resume_early)
282};
283
284static struct platform_driver dw_driver = {
285	.probe		= dw_probe,
286	.remove		= dw_remove,
287	.shutdown       = dw_shutdown,
288	.driver = {
289		.name	= DRV_NAME,
290		.pm	= &dw_dev_pm_ops,
291		.of_match_table = of_match_ptr(dw_dma_of_id_table),
292		.acpi_match_table = ACPI_PTR(dw_dma_acpi_id_table),
293	},
294};
295
296static int __init dw_init(void)
297{
298	return platform_driver_register(&dw_driver);
299}
300subsys_initcall(dw_init);
301
302static void __exit dw_exit(void)
303{
304	platform_driver_unregister(&dw_driver);
305}
306module_exit(dw_exit);
307
308MODULE_LICENSE("GPL v2");
309MODULE_DESCRIPTION("Synopsys DesignWare DMA Controller platform driver");
310MODULE_ALIAS("platform:" DRV_NAME);
311