1/*
2 *  Copyright (C) 2011 Dmitry Eremin-Solenikov
3 *  Copyright (C) 2002 - 2005 Benjamin Herrenschmidt <benh@kernel.crashing.org>
4 *  and                       Markus Demleitner <msdemlei@cl.uni-heidelberg.de>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * This driver adds basic cpufreq support for SMU & 970FX based G5 Macs,
11 * that is iMac G5 and latest single CPU desktop.
12 */
13
14#undef DEBUG
15
16#include <linux/module.h>
17#include <linux/types.h>
18#include <linux/errno.h>
19#include <linux/kernel.h>
20#include <linux/delay.h>
21#include <linux/sched.h>
22#include <linux/cpufreq.h>
23#include <linux/init.h>
24#include <linux/completion.h>
25#include <linux/mutex.h>
26#include <linux/time.h>
27#include <linux/of_device.h>
28
29#define DBG(fmt...) pr_debug(fmt)
30
31/* see 970FX user manual */
32
33#define SCOM_PCR 0x0aa001			/* PCR scom addr */
34
35#define PCR_HILO_SELECT		0x80000000U	/* 1 = PCR, 0 = PCRH */
36#define PCR_SPEED_FULL		0x00000000U	/* 1:1 speed value */
37#define PCR_SPEED_HALF		0x00020000U	/* 1:2 speed value */
38#define PCR_SPEED_QUARTER	0x00040000U	/* 1:4 speed value */
39#define PCR_SPEED_MASK		0x000e0000U	/* speed mask */
40#define PCR_SPEED_SHIFT		17
41#define PCR_FREQ_REQ_VALID	0x00010000U	/* freq request valid */
42#define PCR_VOLT_REQ_VALID	0x00008000U	/* volt request valid */
43#define PCR_TARGET_TIME_MASK	0x00006000U	/* target time */
44#define PCR_STATLAT_MASK	0x00001f00U	/* STATLAT value */
45#define PCR_SNOOPLAT_MASK	0x000000f0U	/* SNOOPLAT value */
46#define PCR_SNOOPACC_MASK	0x0000000fU	/* SNOOPACC value */
47
48#define SCOM_PSR 0x408001			/* PSR scom addr */
49/* warning: PSR is a 64 bits register */
50#define PSR_CMD_RECEIVED	0x2000000000000000U   /* command received */
51#define PSR_CMD_COMPLETED	0x1000000000000000U   /* command completed */
52#define PSR_CUR_SPEED_MASK	0x0300000000000000U   /* current speed */
53#define PSR_CUR_SPEED_SHIFT	(56)
54
55/*
56 * The G5 only supports two frequencies (Quarter speed is not supported)
57 */
58#define CPUFREQ_HIGH                  0
59#define CPUFREQ_LOW                   1
60
61static struct cpufreq_frequency_table maple_cpu_freqs[] = {
62	{0, CPUFREQ_HIGH,		0},
63	{0, CPUFREQ_LOW,		0},
64	{0, 0,				CPUFREQ_TABLE_END},
65};
66
67/* Power mode data is an array of the 32 bits PCR values to use for
68 * the various frequencies, retrieved from the device-tree
69 */
70static int maple_pmode_cur;
71
72static const u32 *maple_pmode_data;
73static int maple_pmode_max;
74
75/*
76 * SCOM based frequency switching for 970FX rev3
77 */
78static int maple_scom_switch_freq(int speed_mode)
79{
80	unsigned long flags;
81	int to;
82
83	local_irq_save(flags);
84
85	/* Clear PCR high */
86	scom970_write(SCOM_PCR, 0);
87	/* Clear PCR low */
88	scom970_write(SCOM_PCR, PCR_HILO_SELECT | 0);
89	/* Set PCR low */
90	scom970_write(SCOM_PCR, PCR_HILO_SELECT |
91		      maple_pmode_data[speed_mode]);
92
93	/* Wait for completion */
94	for (to = 0; to < 10; to++) {
95		unsigned long psr = scom970_read(SCOM_PSR);
96
97		if ((psr & PSR_CMD_RECEIVED) == 0 &&
98		    (((psr >> PSR_CUR_SPEED_SHIFT) ^
99		      (maple_pmode_data[speed_mode] >> PCR_SPEED_SHIFT)) & 0x3)
100		    == 0)
101			break;
102		if (psr & PSR_CMD_COMPLETED)
103			break;
104		udelay(100);
105	}
106
107	local_irq_restore(flags);
108
109	maple_pmode_cur = speed_mode;
110	ppc_proc_freq = maple_cpu_freqs[speed_mode].frequency * 1000ul;
111
112	return 0;
113}
114
115static int maple_scom_query_freq(void)
116{
117	unsigned long psr = scom970_read(SCOM_PSR);
118	int i;
119
120	for (i = 0; i <= maple_pmode_max; i++)
121		if ((((psr >> PSR_CUR_SPEED_SHIFT) ^
122		      (maple_pmode_data[i] >> PCR_SPEED_SHIFT)) & 0x3) == 0)
123			break;
124	return i;
125}
126
127/*
128 * Common interface to the cpufreq core
129 */
130
131static int maple_cpufreq_target(struct cpufreq_policy *policy,
132	unsigned int index)
133{
134	return maple_scom_switch_freq(index);
135}
136
137static unsigned int maple_cpufreq_get_speed(unsigned int cpu)
138{
139	return maple_cpu_freqs[maple_pmode_cur].frequency;
140}
141
142static int maple_cpufreq_cpu_init(struct cpufreq_policy *policy)
143{
144	return cpufreq_generic_init(policy, maple_cpu_freqs, 12000);
145}
146
147static struct cpufreq_driver maple_cpufreq_driver = {
148	.name		= "maple",
149	.flags		= CPUFREQ_CONST_LOOPS,
150	.init		= maple_cpufreq_cpu_init,
151	.verify		= cpufreq_generic_frequency_table_verify,
152	.target_index	= maple_cpufreq_target,
153	.get		= maple_cpufreq_get_speed,
154	.attr		= cpufreq_generic_attr,
155};
156
157static int __init maple_cpufreq_init(void)
158{
159	struct device_node *cpunode;
160	unsigned int psize;
161	unsigned long max_freq;
162	const u32 *valp;
163	u32 pvr_hi;
164	int rc = -ENODEV;
165
166	/*
167	 * Behave here like powermac driver which checks machine compatibility
168	 * to ease merging of two drivers in future.
169	 */
170	if (!of_machine_is_compatible("Momentum,Maple") &&
171	    !of_machine_is_compatible("Momentum,Apache"))
172		return 0;
173
174	/* Get first CPU node */
175	cpunode = of_cpu_device_node_get(0);
176	if (cpunode == NULL) {
177		printk(KERN_ERR "cpufreq: Can't find any CPU 0 node\n");
178		goto bail_noprops;
179	}
180
181	/* Check 970FX for now */
182	/* we actually don't care on which CPU to access PVR */
183	pvr_hi = PVR_VER(mfspr(SPRN_PVR));
184	if (pvr_hi != 0x3c && pvr_hi != 0x44) {
185		printk(KERN_ERR "cpufreq: Unsupported CPU version (%x)\n",
186				pvr_hi);
187		goto bail_noprops;
188	}
189
190	/* Look for the powertune data in the device-tree */
191	/*
192	 * On Maple this property is provided by PIBS in dual-processor config,
193	 * not provided by PIBS in CPU0 config and also not provided by SLOF,
194	 * so YMMV
195	 */
196	maple_pmode_data = of_get_property(cpunode, "power-mode-data", &psize);
197	if (!maple_pmode_data) {
198		DBG("No power-mode-data !\n");
199		goto bail_noprops;
200	}
201	maple_pmode_max = psize / sizeof(u32) - 1;
202
203	/*
204	 * From what I see, clock-frequency is always the maximal frequency.
205	 * The current driver can not slew sysclk yet, so we really only deal
206	 * with powertune steps for now. We also only implement full freq and
207	 * half freq in this version. So far, I haven't yet seen a machine
208	 * supporting anything else.
209	 */
210	valp = of_get_property(cpunode, "clock-frequency", NULL);
211	if (!valp)
212		return -ENODEV;
213	max_freq = (*valp)/1000;
214	maple_cpu_freqs[0].frequency = max_freq;
215	maple_cpu_freqs[1].frequency = max_freq/2;
216
217	/* Force apply current frequency to make sure everything is in
218	 * sync (voltage is right for example). Firmware may leave us with
219	 * a strange setting ...
220	 */
221	msleep(10);
222	maple_pmode_cur = -1;
223	maple_scom_switch_freq(maple_scom_query_freq());
224
225	printk(KERN_INFO "Registering Maple CPU frequency driver\n");
226	printk(KERN_INFO "Low: %d Mhz, High: %d Mhz, Cur: %d MHz\n",
227		maple_cpu_freqs[1].frequency/1000,
228		maple_cpu_freqs[0].frequency/1000,
229		maple_cpu_freqs[maple_pmode_cur].frequency/1000);
230
231	rc = cpufreq_register_driver(&maple_cpufreq_driver);
232
233	of_node_put(cpunode);
234
235	return rc;
236
237bail_noprops:
238	of_node_put(cpunode);
239
240	return rc;
241}
242
243module_init(maple_cpufreq_init);
244
245
246MODULE_LICENSE("GPL");
247