1/*
2 * include/asm-xtensa/page.h
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version2 as
6 * published by the Free Software Foundation.
7 *
8 * Copyright (C) 2001 - 2007 Tensilica Inc.
9 */
10
11#ifndef _XTENSA_PAGE_H
12#define _XTENSA_PAGE_H
13
14#include <asm/processor.h>
15#include <asm/types.h>
16#include <asm/cache.h>
17#include <platform/hardware.h>
18
19/*
20 * Fixed TLB translations in the processor.
21 */
22
23#define XCHAL_KSEG_CACHED_VADDR __XTENSA_UL_CONST(0xd0000000)
24#define XCHAL_KSEG_BYPASS_VADDR __XTENSA_UL_CONST(0xd8000000)
25#define XCHAL_KSEG_PADDR        __XTENSA_UL_CONST(0x00000000)
26#define XCHAL_KSEG_SIZE         __XTENSA_UL_CONST(0x08000000)
27
28/*
29 * PAGE_SHIFT determines the page size
30 */
31
32#define PAGE_SHIFT	12
33#define PAGE_SIZE	(__XTENSA_UL_CONST(1) << PAGE_SHIFT)
34#define PAGE_MASK	(~(PAGE_SIZE-1))
35
36#ifdef CONFIG_MMU
37#define PAGE_OFFSET	XCHAL_KSEG_CACHED_VADDR
38#define MAX_MEM_PFN	XCHAL_KSEG_SIZE
39#else
40#define PAGE_OFFSET	__XTENSA_UL_CONST(0)
41#define MAX_MEM_PFN	(PLATFORM_DEFAULT_MEM_START + PLATFORM_DEFAULT_MEM_SIZE)
42#endif
43
44#define PGTABLE_START	0x80000000
45
46/*
47 * Cache aliasing:
48 *
49 * If the cache size for one way is greater than the page size, we have to
50 * deal with cache aliasing. The cache index is wider than the page size:
51 *
52 * |    |cache| cache index
53 * | pfn  |off|	virtual address
54 * |xxxx:X|zzz|
55 * |    : |   |
56 * | \  / |   |
57 * |trans.|   |
58 * | /  \ |   |
59 * |yyyy:Y|zzz|	physical address
60 *
61 * When the page number is translated to the physical page address, the lowest
62 * bit(s) (X) that are part of the cache index are also translated (Y).
63 * If this translation changes bit(s) (X), the cache index is also afected,
64 * thus resulting in a different cache line than before.
65 * The kernel does not provide a mechanism to ensure that the page color
66 * (represented by this bit) remains the same when allocated or when pages
67 * are remapped. When user pages are mapped into kernel space, the color of
68 * the page might also change.
69 *
70 * We use the address space VMALLOC_END ... VMALLOC_END + DCACHE_WAY_SIZE * 2
71 * to temporarily map a patch so we can match the color.
72 */
73
74#if DCACHE_WAY_SIZE > PAGE_SIZE
75# define DCACHE_ALIAS_ORDER	(DCACHE_WAY_SHIFT - PAGE_SHIFT)
76# define DCACHE_ALIAS_MASK	(PAGE_MASK & (DCACHE_WAY_SIZE - 1))
77# define DCACHE_ALIAS(a)	(((a) & DCACHE_ALIAS_MASK) >> PAGE_SHIFT)
78# define DCACHE_ALIAS_EQ(a,b)	((((a) ^ (b)) & DCACHE_ALIAS_MASK) == 0)
79#else
80# define DCACHE_ALIAS_ORDER	0
81# define DCACHE_ALIAS(a)	((void)(a), 0)
82#endif
83#define DCACHE_N_COLORS		(1 << DCACHE_ALIAS_ORDER)
84
85#if ICACHE_WAY_SIZE > PAGE_SIZE
86# define ICACHE_ALIAS_ORDER	(ICACHE_WAY_SHIFT - PAGE_SHIFT)
87# define ICACHE_ALIAS_MASK	(PAGE_MASK & (ICACHE_WAY_SIZE - 1))
88# define ICACHE_ALIAS(a)	(((a) & ICACHE_ALIAS_MASK) >> PAGE_SHIFT)
89# define ICACHE_ALIAS_EQ(a,b)	((((a) ^ (b)) & ICACHE_ALIAS_MASK) == 0)
90#else
91# define ICACHE_ALIAS_ORDER	0
92#endif
93
94
95#ifdef __ASSEMBLY__
96
97#define __pgprot(x)	(x)
98
99#else
100
101/*
102 * These are used to make use of C type-checking..
103 */
104
105typedef struct { unsigned long pte; } pte_t;		/* page table entry */
106typedef struct { unsigned long pgd; } pgd_t;		/* PGD table entry */
107typedef struct { unsigned long pgprot; } pgprot_t;
108typedef struct page *pgtable_t;
109
110#define pte_val(x)	((x).pte)
111#define pgd_val(x)	((x).pgd)
112#define pgprot_val(x)	((x).pgprot)
113
114#define __pte(x)	((pte_t) { (x) } )
115#define __pgd(x)	((pgd_t) { (x) } )
116#define __pgprot(x)	((pgprot_t) { (x) } )
117
118/*
119 * Pure 2^n version of get_order
120 * Use 'nsau' instructions if supported by the processor or the generic version.
121 */
122
123#if XCHAL_HAVE_NSA
124
125static inline __attribute_const__ int get_order(unsigned long size)
126{
127	int lz;
128	asm ("nsau %0, %1" : "=r" (lz) : "r" ((size - 1) >> PAGE_SHIFT));
129	return 32 - lz;
130}
131
132#else
133
134# include <asm-generic/getorder.h>
135
136#endif
137
138struct page;
139struct vm_area_struct;
140extern void clear_page(void *page);
141extern void copy_page(void *to, void *from);
142
143/*
144 * If we have cache aliasing and writeback caches, we might have to do
145 * some extra work
146 */
147
148#if defined(CONFIG_MMU) && DCACHE_WAY_SIZE > PAGE_SIZE
149extern void clear_page_alias(void *vaddr, unsigned long paddr);
150extern void copy_page_alias(void *to, void *from,
151			    unsigned long to_paddr, unsigned long from_paddr);
152
153#define clear_user_highpage clear_user_highpage
154void clear_user_highpage(struct page *page, unsigned long vaddr);
155#define __HAVE_ARCH_COPY_USER_HIGHPAGE
156void copy_user_highpage(struct page *to, struct page *from,
157			unsigned long vaddr, struct vm_area_struct *vma);
158#else
159# define clear_user_page(page, vaddr, pg)	clear_page(page)
160# define copy_user_page(to, from, vaddr, pg)	copy_page(to, from)
161#endif
162
163/*
164 * This handles the memory map.  We handle pages at
165 * XCHAL_KSEG_CACHED_VADDR for kernels with 32 bit address space.
166 * These macros are for conversion of kernel address, not user
167 * addresses.
168 */
169
170#define ARCH_PFN_OFFSET		(PLATFORM_DEFAULT_MEM_START >> PAGE_SHIFT)
171
172#define __pa(x)			((unsigned long) (x) - PAGE_OFFSET)
173#define __va(x)			((void *)((unsigned long) (x) + PAGE_OFFSET))
174#define pfn_valid(pfn) \
175	((pfn) >= ARCH_PFN_OFFSET && ((pfn) - ARCH_PFN_OFFSET) < max_mapnr)
176
177#ifdef CONFIG_DISCONTIGMEM
178# error CONFIG_DISCONTIGMEM not supported
179#endif
180
181#define virt_to_page(kaddr)	pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
182#define page_to_virt(page)	__va(page_to_pfn(page) << PAGE_SHIFT)
183#define virt_addr_valid(kaddr)	pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
184#define page_to_phys(page)	(page_to_pfn(page) << PAGE_SHIFT)
185
186#endif /* __ASSEMBLY__ */
187
188#define VM_DATA_DEFAULT_FLAGS	(VM_READ | VM_WRITE | VM_EXEC | \
189				 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
190
191#include <asm-generic/memory_model.h>
192#endif /* _XTENSA_PAGE_H */
193