1/*
2 *  AMD CPU Microcode Update Driver for Linux
3 *  Copyright (C) 2008-2011 Advanced Micro Devices Inc.
4 *
5 *  Author: Peter Oruba <peter.oruba@amd.com>
6 *
7 *  Based on work by:
8 *  Tigran Aivazian <tigran@aivazian.fsnet.co.uk>
9 *
10 *  Maintainers:
11 *  Andreas Herrmann <herrmann.der.user@googlemail.com>
12 *  Borislav Petkov <bp@alien8.de>
13 *
14 *  This driver allows to upgrade microcode on F10h AMD
15 *  CPUs and later.
16 *
17 *  Licensed under the terms of the GNU General Public
18 *  License version 2. See file COPYING for details.
19 */
20
21#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
22
23#include <linux/firmware.h>
24#include <linux/uaccess.h>
25#include <linux/vmalloc.h>
26#include <linux/kernel.h>
27#include <linux/module.h>
28#include <linux/pci.h>
29
30#include <asm/microcode.h>
31#include <asm/processor.h>
32#include <asm/msr.h>
33#include <asm/microcode_amd.h>
34
35MODULE_DESCRIPTION("AMD Microcode Update Driver");
36MODULE_AUTHOR("Peter Oruba");
37MODULE_LICENSE("GPL v2");
38
39static struct equiv_cpu_entry *equiv_cpu_table;
40
41struct ucode_patch {
42	struct list_head plist;
43	void *data;
44	u32 patch_id;
45	u16 equiv_cpu;
46};
47
48static LIST_HEAD(pcache);
49
50static u16 __find_equiv_id(unsigned int cpu)
51{
52	struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
53	return find_equiv_id(equiv_cpu_table, uci->cpu_sig.sig);
54}
55
56static u32 find_cpu_family_by_equiv_cpu(u16 equiv_cpu)
57{
58	int i = 0;
59
60	BUG_ON(!equiv_cpu_table);
61
62	while (equiv_cpu_table[i].equiv_cpu != 0) {
63		if (equiv_cpu == equiv_cpu_table[i].equiv_cpu)
64			return equiv_cpu_table[i].installed_cpu;
65		i++;
66	}
67	return 0;
68}
69
70/*
71 * a small, trivial cache of per-family ucode patches
72 */
73static struct ucode_patch *cache_find_patch(u16 equiv_cpu)
74{
75	struct ucode_patch *p;
76
77	list_for_each_entry(p, &pcache, plist)
78		if (p->equiv_cpu == equiv_cpu)
79			return p;
80	return NULL;
81}
82
83static void update_cache(struct ucode_patch *new_patch)
84{
85	struct ucode_patch *p;
86
87	list_for_each_entry(p, &pcache, plist) {
88		if (p->equiv_cpu == new_patch->equiv_cpu) {
89			if (p->patch_id >= new_patch->patch_id)
90				/* we already have the latest patch */
91				return;
92
93			list_replace(&p->plist, &new_patch->plist);
94			kfree(p->data);
95			kfree(p);
96			return;
97		}
98	}
99	/* no patch found, add it */
100	list_add_tail(&new_patch->plist, &pcache);
101}
102
103static void free_cache(void)
104{
105	struct ucode_patch *p, *tmp;
106
107	list_for_each_entry_safe(p, tmp, &pcache, plist) {
108		__list_del(p->plist.prev, p->plist.next);
109		kfree(p->data);
110		kfree(p);
111	}
112}
113
114static struct ucode_patch *find_patch(unsigned int cpu)
115{
116	u16 equiv_id;
117
118	equiv_id = __find_equiv_id(cpu);
119	if (!equiv_id)
120		return NULL;
121
122	return cache_find_patch(equiv_id);
123}
124
125static int collect_cpu_info_amd(int cpu, struct cpu_signature *csig)
126{
127	struct cpuinfo_x86 *c = &cpu_data(cpu);
128	struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
129	struct ucode_patch *p;
130
131	csig->sig = cpuid_eax(0x00000001);
132	csig->rev = c->microcode;
133
134	/*
135	 * a patch could have been loaded early, set uci->mc so that
136	 * mc_bp_resume() can call apply_microcode()
137	 */
138	p = find_patch(cpu);
139	if (p && (p->patch_id == csig->rev))
140		uci->mc = p->data;
141
142	pr_info("CPU%d: patch_level=0x%08x\n", cpu, csig->rev);
143
144	return 0;
145}
146
147static unsigned int verify_patch_size(u8 family, u32 patch_size,
148				      unsigned int size)
149{
150	u32 max_size;
151
152#define F1XH_MPB_MAX_SIZE 2048
153#define F14H_MPB_MAX_SIZE 1824
154#define F15H_MPB_MAX_SIZE 4096
155#define F16H_MPB_MAX_SIZE 3458
156
157	switch (family) {
158	case 0x14:
159		max_size = F14H_MPB_MAX_SIZE;
160		break;
161	case 0x15:
162		max_size = F15H_MPB_MAX_SIZE;
163		break;
164	case 0x16:
165		max_size = F16H_MPB_MAX_SIZE;
166		break;
167	default:
168		max_size = F1XH_MPB_MAX_SIZE;
169		break;
170	}
171
172	if (patch_size > min_t(u32, size, max_size)) {
173		pr_err("patch size mismatch\n");
174		return 0;
175	}
176
177	return patch_size;
178}
179
180int __apply_microcode_amd(struct microcode_amd *mc_amd)
181{
182	u32 rev, dummy;
183
184	native_wrmsrl(MSR_AMD64_PATCH_LOADER, (u64)(long)&mc_amd->hdr.data_code);
185
186	/* verify patch application was successful */
187	native_rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy);
188	if (rev != mc_amd->hdr.patch_id)
189		return -1;
190
191	return 0;
192}
193
194int apply_microcode_amd(int cpu)
195{
196	struct cpuinfo_x86 *c = &cpu_data(cpu);
197	struct microcode_amd *mc_amd;
198	struct ucode_cpu_info *uci;
199	struct ucode_patch *p;
200	u32 rev, dummy;
201
202	BUG_ON(raw_smp_processor_id() != cpu);
203
204	uci = ucode_cpu_info + cpu;
205
206	p = find_patch(cpu);
207	if (!p)
208		return 0;
209
210	mc_amd  = p->data;
211	uci->mc = p->data;
212
213	rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy);
214
215	/* need to apply patch? */
216	if (rev >= mc_amd->hdr.patch_id) {
217		c->microcode = rev;
218		uci->cpu_sig.rev = rev;
219		return 0;
220	}
221
222	if (__apply_microcode_amd(mc_amd)) {
223		pr_err("CPU%d: update failed for patch_level=0x%08x\n",
224			cpu, mc_amd->hdr.patch_id);
225		return -1;
226	}
227	pr_info("CPU%d: new patch_level=0x%08x\n", cpu,
228		mc_amd->hdr.patch_id);
229
230	uci->cpu_sig.rev = mc_amd->hdr.patch_id;
231	c->microcode = mc_amd->hdr.patch_id;
232
233	return 0;
234}
235
236static int install_equiv_cpu_table(const u8 *buf)
237{
238	unsigned int *ibuf = (unsigned int *)buf;
239	unsigned int type = ibuf[1];
240	unsigned int size = ibuf[2];
241
242	if (type != UCODE_EQUIV_CPU_TABLE_TYPE || !size) {
243		pr_err("empty section/"
244		       "invalid type field in container file section header\n");
245		return -EINVAL;
246	}
247
248	equiv_cpu_table = vmalloc(size);
249	if (!equiv_cpu_table) {
250		pr_err("failed to allocate equivalent CPU table\n");
251		return -ENOMEM;
252	}
253
254	memcpy(equiv_cpu_table, buf + CONTAINER_HDR_SZ, size);
255
256	/* add header length */
257	return size + CONTAINER_HDR_SZ;
258}
259
260static void free_equiv_cpu_table(void)
261{
262	vfree(equiv_cpu_table);
263	equiv_cpu_table = NULL;
264}
265
266static void cleanup(void)
267{
268	free_equiv_cpu_table();
269	free_cache();
270}
271
272/*
273 * We return the current size even if some of the checks failed so that
274 * we can skip over the next patch. If we return a negative value, we
275 * signal a grave error like a memory allocation has failed and the
276 * driver cannot continue functioning normally. In such cases, we tear
277 * down everything we've used up so far and exit.
278 */
279static int verify_and_add_patch(u8 family, u8 *fw, unsigned int leftover)
280{
281	struct microcode_header_amd *mc_hdr;
282	struct ucode_patch *patch;
283	unsigned int patch_size, crnt_size, ret;
284	u32 proc_fam;
285	u16 proc_id;
286
287	patch_size  = *(u32 *)(fw + 4);
288	crnt_size   = patch_size + SECTION_HDR_SIZE;
289	mc_hdr	    = (struct microcode_header_amd *)(fw + SECTION_HDR_SIZE);
290	proc_id	    = mc_hdr->processor_rev_id;
291
292	proc_fam = find_cpu_family_by_equiv_cpu(proc_id);
293	if (!proc_fam) {
294		pr_err("No patch family for equiv ID: 0x%04x\n", proc_id);
295		return crnt_size;
296	}
297
298	/* check if patch is for the current family */
299	proc_fam = ((proc_fam >> 8) & 0xf) + ((proc_fam >> 20) & 0xff);
300	if (proc_fam != family)
301		return crnt_size;
302
303	if (mc_hdr->nb_dev_id || mc_hdr->sb_dev_id) {
304		pr_err("Patch-ID 0x%08x: chipset-specific code unsupported.\n",
305			mc_hdr->patch_id);
306		return crnt_size;
307	}
308
309	ret = verify_patch_size(family, patch_size, leftover);
310	if (!ret) {
311		pr_err("Patch-ID 0x%08x: size mismatch.\n", mc_hdr->patch_id);
312		return crnt_size;
313	}
314
315	patch = kzalloc(sizeof(*patch), GFP_KERNEL);
316	if (!patch) {
317		pr_err("Patch allocation failure.\n");
318		return -EINVAL;
319	}
320
321	patch->data = kzalloc(patch_size, GFP_KERNEL);
322	if (!patch->data) {
323		pr_err("Patch data allocation failure.\n");
324		kfree(patch);
325		return -EINVAL;
326	}
327
328	/* All looks ok, copy patch... */
329	memcpy(patch->data, fw + SECTION_HDR_SIZE, patch_size);
330	INIT_LIST_HEAD(&patch->plist);
331	patch->patch_id  = mc_hdr->patch_id;
332	patch->equiv_cpu = proc_id;
333
334	pr_debug("%s: Added patch_id: 0x%08x, proc_id: 0x%04x\n",
335		 __func__, patch->patch_id, proc_id);
336
337	/* ... and add to cache. */
338	update_cache(patch);
339
340	return crnt_size;
341}
342
343static enum ucode_state __load_microcode_amd(u8 family, const u8 *data,
344					     size_t size)
345{
346	enum ucode_state ret = UCODE_ERROR;
347	unsigned int leftover;
348	u8 *fw = (u8 *)data;
349	int crnt_size = 0;
350	int offset;
351
352	offset = install_equiv_cpu_table(data);
353	if (offset < 0) {
354		pr_err("failed to create equivalent cpu table\n");
355		return ret;
356	}
357	fw += offset;
358	leftover = size - offset;
359
360	if (*(u32 *)fw != UCODE_UCODE_TYPE) {
361		pr_err("invalid type field in container file section header\n");
362		free_equiv_cpu_table();
363		return ret;
364	}
365
366	while (leftover) {
367		crnt_size = verify_and_add_patch(family, fw, leftover);
368		if (crnt_size < 0)
369			return ret;
370
371		fw	 += crnt_size;
372		leftover -= crnt_size;
373	}
374
375	return UCODE_OK;
376}
377
378enum ucode_state load_microcode_amd(int cpu, u8 family, const u8 *data, size_t size)
379{
380	enum ucode_state ret;
381
382	/* free old equiv table */
383	free_equiv_cpu_table();
384
385	ret = __load_microcode_amd(family, data, size);
386
387	if (ret != UCODE_OK)
388		cleanup();
389
390#if defined(CONFIG_MICROCODE_AMD_EARLY) && defined(CONFIG_X86_32)
391	/* save BSP's matching patch for early load */
392	if (cpu_data(cpu).cpu_index == boot_cpu_data.cpu_index) {
393		struct ucode_patch *p = find_patch(cpu);
394		if (p) {
395			memset(amd_ucode_patch, 0, PATCH_MAX_SIZE);
396			memcpy(amd_ucode_patch, p->data, min_t(u32, ksize(p->data),
397							       PATCH_MAX_SIZE));
398		}
399	}
400#endif
401	return ret;
402}
403
404/*
405 * AMD microcode firmware naming convention, up to family 15h they are in
406 * the legacy file:
407 *
408 *    amd-ucode/microcode_amd.bin
409 *
410 * This legacy file is always smaller than 2K in size.
411 *
412 * Beginning with family 15h, they are in family-specific firmware files:
413 *
414 *    amd-ucode/microcode_amd_fam15h.bin
415 *    amd-ucode/microcode_amd_fam16h.bin
416 *    ...
417 *
418 * These might be larger than 2K.
419 */
420static enum ucode_state request_microcode_amd(int cpu, struct device *device,
421					      bool refresh_fw)
422{
423	char fw_name[36] = "amd-ucode/microcode_amd.bin";
424	struct cpuinfo_x86 *c = &cpu_data(cpu);
425	enum ucode_state ret = UCODE_NFOUND;
426	const struct firmware *fw;
427
428	/* reload ucode container only on the boot cpu */
429	if (!refresh_fw || c->cpu_index != boot_cpu_data.cpu_index)
430		return UCODE_OK;
431
432	if (c->x86 >= 0x15)
433		snprintf(fw_name, sizeof(fw_name), "amd-ucode/microcode_amd_fam%.2xh.bin", c->x86);
434
435	if (request_firmware_direct(&fw, (const char *)fw_name, device)) {
436		pr_debug("failed to load file %s\n", fw_name);
437		goto out;
438	}
439
440	ret = UCODE_ERROR;
441	if (*(u32 *)fw->data != UCODE_MAGIC) {
442		pr_err("invalid magic value (0x%08x)\n", *(u32 *)fw->data);
443		goto fw_release;
444	}
445
446	ret = load_microcode_amd(cpu, c->x86, fw->data, fw->size);
447
448 fw_release:
449	release_firmware(fw);
450
451 out:
452	return ret;
453}
454
455static enum ucode_state
456request_microcode_user(int cpu, const void __user *buf, size_t size)
457{
458	return UCODE_ERROR;
459}
460
461static void microcode_fini_cpu_amd(int cpu)
462{
463	struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
464
465	uci->mc = NULL;
466}
467
468static struct microcode_ops microcode_amd_ops = {
469	.request_microcode_user           = request_microcode_user,
470	.request_microcode_fw             = request_microcode_amd,
471	.collect_cpu_info                 = collect_cpu_info_amd,
472	.apply_microcode                  = apply_microcode_amd,
473	.microcode_fini_cpu               = microcode_fini_cpu_amd,
474};
475
476struct microcode_ops * __init init_amd_microcode(void)
477{
478	struct cpuinfo_x86 *c = &cpu_data(0);
479
480	if (c->x86_vendor != X86_VENDOR_AMD || c->x86 < 0x10) {
481		pr_warning("AMD CPU family 0x%x not supported\n", c->x86);
482		return NULL;
483	}
484
485	return &microcode_amd_ops;
486}
487
488void __exit exit_amd_microcode(void)
489{
490	cleanup();
491}
492