1/*
2 *  include/asm-sh/cpu-sh3/gpio.h
3 *
4 *  Copyright (C) 2007  Markus Brunner, Mark Jonas
5 *
6 *  Addresses for the Pin Function Controller
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License.  See the file "COPYING" in the main directory of this archive
10 * for more details.
11 */
12#ifndef _CPU_SH3_GPIO_H
13#define _CPU_SH3_GPIO_H
14
15#if defined(CONFIG_CPU_SUBTYPE_SH7720) || \
16    defined(CONFIG_CPU_SUBTYPE_SH7721)
17
18/* Control registers */
19#define PORT_PACR	0xA4050100UL
20#define PORT_PBCR	0xA4050102UL
21#define PORT_PCCR	0xA4050104UL
22#define PORT_PDCR	0xA4050106UL
23#define PORT_PECR	0xA4050108UL
24#define PORT_PFCR	0xA405010AUL
25#define PORT_PGCR	0xA405010CUL
26#define PORT_PHCR	0xA405010EUL
27#define PORT_PJCR	0xA4050110UL
28#define PORT_PKCR	0xA4050112UL
29#define PORT_PLCR	0xA4050114UL
30#define PORT_PMCR	0xA4050116UL
31#define PORT_PPCR	0xA4050118UL
32#define PORT_PRCR	0xA405011AUL
33#define PORT_PSCR	0xA405011CUL
34#define PORT_PTCR	0xA405011EUL
35#define PORT_PUCR	0xA4050120UL
36#define PORT_PVCR	0xA4050122UL
37
38/* Data registers */
39#define PORT_PADR	0xA4050140UL
40/* Address of PORT_PBDR is wrong in the datasheet, see errata 2005-09-21 */
41#define PORT_PBDR	0xA4050142UL
42#define PORT_PCDR	0xA4050144UL
43#define PORT_PDDR	0xA4050146UL
44#define PORT_PEDR	0xA4050148UL
45#define PORT_PFDR	0xA405014AUL
46#define PORT_PGDR	0xA405014CUL
47#define PORT_PHDR	0xA405014EUL
48#define PORT_PJDR	0xA4050150UL
49#define PORT_PKDR	0xA4050152UL
50#define PORT_PLDR	0xA4050154UL
51#define PORT_PMDR	0xA4050156UL
52#define PORT_PPDR	0xA4050158UL
53#define PORT_PRDR	0xA405015AUL
54#define PORT_PSDR	0xA405015CUL
55#define PORT_PTDR	0xA405015EUL
56#define PORT_PUDR	0xA4050160UL
57#define PORT_PVDR	0xA4050162UL
58
59/* Pin Select Registers */
60#define PORT_PSELA	0xA4050124UL
61#define PORT_PSELB	0xA4050126UL
62#define PORT_PSELC	0xA4050128UL
63#define PORT_PSELD	0xA405012AUL
64
65#elif defined(CONFIG_CPU_SUBTYPE_SH7709)
66
67/* Control registers */
68#define PORT_PACR       0xa4000100UL
69#define PORT_PBCR       0xa4000102UL
70#define PORT_PCCR       0xa4000104UL
71#define PORT_PFCR       0xa400010aUL
72
73/* Data registers */
74#define PORT_PADR       0xa4000120UL
75#define PORT_PBDR       0xa4000122UL
76#define PORT_PCDR       0xa4000124UL
77#define PORT_PFDR       0xa400012aUL
78
79#endif
80
81#endif
82