1/*
2 * P1022 DS 36-bit Physical Address Map Device Tree Source
3 *
4 * Copyright 2012 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 *     * Redistributions of source code must retain the above copyright
9 *       notice, this list of conditions and the following disclaimer.
10 *     * Redistributions in binary form must reproduce the above copyright
11 *       notice, this list of conditions and the following disclaimer in the
12 *       documentation and/or other materials provided with the distribution.
13 *     * Neither the name of Freescale Semiconductor nor the
14 *       names of its contributors may be used to endorse or promote products
15 *       derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/include/ "fsl/p1022si-pre.dtsi"
36/ {
37	model = "fsl,P1022DS";
38	compatible = "fsl,P1022DS";
39
40	memory {
41		device_type = "memory";
42	};
43
44	board_lbc: lbc: localbus@fffe05000 {
45		ranges = <0x0 0x0 0xf 0xe8000000 0x08000000
46			  0x1 0x0 0xf 0xe0000000 0x08000000
47			  0x2 0x0 0xf 0xff800000 0x00040000
48			  0x3 0x0 0xf 0xffdf0000 0x00008000>;
49		reg = <0xf 0xffe05000 0 0x1000>;
50	};
51
52	board_soc: soc: soc@fffe00000 {
53		ranges = <0x0 0xf 0xffe00000 0x100000>;
54	};
55
56	pci0: pcie@fffe09000 {
57		ranges = <0x2000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
58			  0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>;
59		reg = <0xf 0xffe09000 0 0x1000>;
60		pcie@0 {
61			ranges = <0x2000000 0x0 0xe0000000
62				  0x2000000 0x0 0xe0000000
63				  0x0 0x20000000
64
65				  0x1000000 0x0 0x0
66				  0x1000000 0x0 0x0
67				  0x0 0x100000>;
68		};
69	};
70
71	pci1: pcie@fffe0a000 {
72		ranges = <0x2000000 0x0 0xe0000000 0xc 0x40000000 0x0 0x20000000
73			  0x1000000 0x0 0x00000000 0xf 0xffc20000 0x0 0x10000>;
74		reg = <0xf 0xffe0a000 0 0x1000>;
75		pcie@0 {
76			ranges = <0x2000000 0x0 0xe0000000
77				  0x2000000 0x0 0xe0000000
78				  0x0 0x20000000
79
80				  0x1000000 0x0 0x0
81				  0x1000000 0x0 0x0
82				  0x0 0x100000>;
83		};
84	};
85
86	pci2: pcie@fffe0b000 {
87		ranges = <0x2000000 0x0 0xe0000000 0xc 0x00000000 0x0 0x20000000
88			  0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>;
89		reg = <0xf 0xffe0b000 0 0x1000>;
90		pcie@0 {
91			ranges = <0x2000000 0x0 0xe0000000
92				  0x2000000 0x0 0xe0000000
93				  0x0 0x20000000
94
95				  0x1000000 0x0 0x0
96				  0x1000000 0x0 0x0
97				  0x0 0x100000>;
98		};
99	};
100};
101
102/include/ "fsl/p1022si-post.dtsi"
103/include/ "p1022ds.dtsi"
104