1/*
2 * Device Tree Source for Motorola/Emerson MVME5100.
3 *
4 * Copyright 2013 CSC Australia Pty. Ltd.
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2.  This program is licensed "as is" without
8 * any warranty of any kind, whether express or implied.
9 */
10
11/dts-v1/;
12
13/ {
14	model = "MVME5100";
15	compatible = "MVME5100";
16	#address-cells = <1>;
17	#size-cells = <1>;
18
19	aliases {
20		serial0 = &serial0;
21		pci0 = &pci0;
22	};
23
24	cpus {
25		#address-cells = <1>;
26		#size-cells = <0>;
27
28		PowerPC,7410 {
29			device_type = "cpu";
30			reg = <0x0>;
31			/* Following required by dtc but not used */
32			d-cache-line-size = <32>;
33			i-cache-line-size = <32>;
34			i-cache-size = <32768>;
35			d-cache-size = <32768>;
36			timebase-frequency = <25000000>;
37			clock-frequency = <500000000>;
38			bus-frequency = <100000000>;
39		};
40	};
41
42	memory {
43		device_type = "memory";
44		reg = <0x0 0x20000000>;
45	};
46
47	hawk@fef80000 {
48		#address-cells = <1>;
49		#size-cells = <1>;
50		compatible = "hawk-bridge", "simple-bus";
51		ranges = <0x0 0xfef80000 0x10000>;
52		reg = <0xfef80000 0x10000>;
53
54		serial0: serial@8000 {
55			device_type = "serial";
56			compatible = "ns16550";
57			reg = <0x8000 0x80>;
58			reg-shift = <4>;
59			clock-frequency = <1843200>;
60			current-speed = <9600>;
61			interrupts = <1 1>; // IRQ1 Level Active Low.
62			interrupt-parent = <&mpic>;
63		};
64
65		serial1: serial@8200 {
66			device_type = "serial";
67			compatible = "ns16550";
68			reg = <0x8200 0x80>;
69			reg-shift = <4>;
70			clock-frequency = <1843200>;
71			current-speed = <9600>;
72			interrupts = <1 1>; // IRQ1 Level Active Low.
73			interrupt-parent = <&mpic>;
74		};
75
76		mpic: interrupt-controller@f3f80000 {
77			#interrupt-cells = <2>;
78			#address-cells = <0>;
79			device_type = "open-pic";
80			compatible = "chrp,open-pic";
81			interrupt-controller;
82			reg = <0xf3f80000 0x40000>;
83		};
84	};
85
86	pci0: pci@feff0000 {
87		#address-cells = <3>;
88		#size-cells = <2>;
89		#interrupt-cells = <1>;
90		device_type = "pci";
91		compatible = "hawk-pci";
92		reg = <0xfec00000 0x400000>;
93		8259-interrupt-acknowledge = <0xfeff0030>;
94		ranges = <0x1000000 0x0        0x0 0xfe000000 0x0 0x800000
95			  0x2000000 0x0 0x80000000 0x80000000 0x0 0x74000000>;
96		bus-range = <0 255>;
97		clock-frequency = <33333333>;
98		interrupt-parent = <&mpic>;
99		interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
100		interrupt-map = <
101
102			/*
103			 * This definition (IDSEL 11) duplicates the
104			 * interrupts definition in the i8259
105			 * interrupt controller below.
106			 *
107			 * Do not change the interrupt sense/polarity from
108			 * 0x2 to anything else, doing so will cause endless
109			 * "spurious" i8259 interrupts to be fielded.
110			 */
111			// IDSEL 11 - iPMC712 PCI/ISA Bridge
112			0x5800 0x0 0x0 0x1 &mpic 0x0 0x2
113			0x5800 0x0 0x0 0x2 &mpic 0x0 0x2
114			0x5800 0x0 0x0 0x3 &mpic 0x0 0x2
115			0x5800 0x0 0x0 0x4 &mpic 0x0 0x2
116
117			/* IDSEL 12 - Not Used */
118
119			/* IDSEL 13 - Universe VME Bridge */
120			0x6800 0x0 0x0 0x1 &mpic 0x5 0x1
121			0x6800 0x0 0x0 0x2 &mpic 0x6 0x1
122			0x6800 0x0 0x0 0x3 &mpic 0x7 0x1
123			0x6800 0x0 0x0 0x4 &mpic 0x8 0x1
124
125			/* IDSEL 14 - ENET 1 */
126			0x7000 0x0 0x0 0x1 &mpic 0x2 0x1
127
128			/* IDSEL 15 - Not Used */
129
130			/* IDSEL 16 - PMC Slot 1 */
131			0x8000 0x0 0x0 0x1 &mpic 0x9 0x1
132			0x8000 0x0 0x0 0x2 &mpic 0xa 0x1
133			0x8000 0x0 0x0 0x3 &mpic 0xb 0x1
134			0x8000 0x0 0x0 0x4 &mpic 0xc 0x1
135
136			/* IDSEL 17 - PMC Slot 2 */
137			0x8800 0x0 0x0 0x1 &mpic 0xc 0x1
138			0x8800 0x0 0x0 0x2 &mpic 0x9 0x1
139			0x8800 0x0 0x0 0x3 &mpic 0xa 0x1
140			0x8800 0x0 0x0 0x4 &mpic 0xb 0x1
141
142			/* IDSEL 18 - Not Used */
143
144			/* IDSEL 19 - ENET 2 */
145			0x9800 0x0 0x0 0x1 &mpic 0xd 0x1
146
147			/* IDSEL 20 - PMCSPAN (PCI-X) */
148			0xa000 0x0 0x0 0x1 &mpic 0x9 0x1
149			0xa000 0x0 0x0 0x2 &mpic 0xa 0x1
150			0xa000 0x0 0x0 0x3 &mpic 0xb 0x1
151			0xa000 0x0 0x0 0x4 &mpic 0xc 0x1
152
153		>;
154
155		isa {
156			#address-cells = <2>;
157			#size-cells = <1>;
158			#interrupt-cells = <2>;
159			device_type = "isa";
160			compatible = "isa";
161			ranges = <0x00000001 0 0x01000000 0 0x00000000 0x00001000>;
162			interrupt-parent = <&i8259>;
163
164			i8259: interrupt-controller@20 {
165				#interrupt-cells = <2>;
166				#address-cells = <0>;
167				interrupts = <0 2>;
168				device_type = "interrupt-controller";
169				compatible = "chrp,iic";
170				interrupt-controller;
171				reg = <1 0x00000020 0x00000002
172                                       1 0x000000a0 0x00000002
173                                       1 0x000004d0 0x00000002>;
174				interrupt-parent = <&mpic>;
175			};
176
177		};
178
179	};
180
181	chosen {
182		linux,stdout-path = &serial0;
183        };
184
185};
186