1/*
2 * Copyright (c) 2013, The Linux Foundation. All rights reserved.
3 *
4 * This software is licensed under the terms of the GNU General Public
5 * License version 2, as published by the Free Software Foundation, and
6 * may be copied, distributed, and modified under those terms.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
11 * GNU General Public License for more details.
12 */
13
14#ifndef _DT_BINDINGS_CLK_MSM_MMCC_8960_H
15#define _DT_BINDINGS_CLK_MSM_MMCC_8960_H
16
17#define MMSS_AHB_SRC					0
18#define FAB_AHB_CLK					1
19#define APU_AHB_CLK					2
20#define TV_ENC_AHB_CLK					3
21#define AMP_AHB_CLK					4
22#define DSI2_S_AHB_CLK					5
23#define JPEGD_AHB_CLK					6
24#define GFX2D0_AHB_CLK					7
25#define DSI_S_AHB_CLK					8
26#define DSI2_M_AHB_CLK					9
27#define VPE_AHB_CLK					10
28#define SMMU_AHB_CLK					11
29#define HDMI_M_AHB_CLK					12
30#define VFE_AHB_CLK					13
31#define ROT_AHB_CLK					14
32#define VCODEC_AHB_CLK					15
33#define MDP_AHB_CLK					16
34#define DSI_M_AHB_CLK					17
35#define CSI_AHB_CLK					18
36#define MMSS_IMEM_AHB_CLK				19
37#define IJPEG_AHB_CLK					20
38#define HDMI_S_AHB_CLK					21
39#define GFX3D_AHB_CLK					22
40#define GFX2D1_AHB_CLK					23
41#define MMSS_FPB_CLK					24
42#define MMSS_AXI_SRC					25
43#define MMSS_FAB_CORE					26
44#define FAB_MSP_AXI_CLK					27
45#define JPEGD_AXI_CLK					28
46#define GMEM_AXI_CLK					29
47#define MDP_AXI_CLK					30
48#define MMSS_IMEM_AXI_CLK				31
49#define IJPEG_AXI_CLK					32
50#define GFX3D_AXI_CLK					33
51#define VCODEC_AXI_CLK					34
52#define VFE_AXI_CLK					35
53#define VPE_AXI_CLK					36
54#define ROT_AXI_CLK					37
55#define VCODEC_AXI_A_CLK				38
56#define VCODEC_AXI_B_CLK				39
57#define MM_AXI_S3_FCLK					40
58#define MM_AXI_S2_FCLK					41
59#define MM_AXI_S1_FCLK					42
60#define MM_AXI_S0_FCLK					43
61#define MM_AXI_S2_CLK					44
62#define MM_AXI_S1_CLK					45
63#define MM_AXI_S0_CLK					46
64#define CSI0_SRC					47
65#define CSI0_CLK					48
66#define CSI0_PHY_CLK					49
67#define CSI1_SRC					50
68#define CSI1_CLK					51
69#define CSI1_PHY_CLK					52
70#define CSI2_SRC					53
71#define CSI2_CLK					54
72#define CSI2_PHY_CLK					55
73#define DSI_SRC						56
74#define DSI_CLK						57
75#define CSI_PIX_CLK					58
76#define CSI_RDI_CLK					59
77#define MDP_VSYNC_CLK					60
78#define HDMI_DIV_CLK					61
79#define HDMI_APP_CLK					62
80#define CSI_PIX1_CLK					63
81#define CSI_RDI2_CLK					64
82#define CSI_RDI1_CLK					65
83#define GFX2D0_SRC					66
84#define GFX2D0_CLK					67
85#define GFX2D1_SRC					68
86#define GFX2D1_CLK					69
87#define GFX3D_SRC					70
88#define GFX3D_CLK					71
89#define IJPEG_SRC					72
90#define IJPEG_CLK					73
91#define JPEGD_SRC					74
92#define JPEGD_CLK					75
93#define MDP_SRC						76
94#define MDP_CLK						77
95#define MDP_LUT_CLK					78
96#define DSI2_PIXEL_SRC					79
97#define DSI2_PIXEL_CLK					80
98#define DSI2_SRC					81
99#define DSI2_CLK					82
100#define DSI1_BYTE_SRC					83
101#define DSI1_BYTE_CLK					84
102#define DSI2_BYTE_SRC					85
103#define DSI2_BYTE_CLK					86
104#define DSI1_ESC_SRC					87
105#define DSI1_ESC_CLK					88
106#define DSI2_ESC_SRC					89
107#define DSI2_ESC_CLK					90
108#define ROT_SRC						91
109#define ROT_CLK						92
110#define TV_ENC_CLK					93
111#define TV_DAC_CLK					94
112#define HDMI_TV_CLK					95
113#define MDP_TV_CLK					96
114#define TV_SRC						97
115#define VCODEC_SRC					98
116#define VCODEC_CLK					99
117#define VFE_SRC						100
118#define VFE_CLK						101
119#define VFE_CSI_CLK					102
120#define VPE_SRC						103
121#define VPE_CLK						104
122#define DSI_PIXEL_SRC					105
123#define DSI_PIXEL_CLK					106
124#define CAMCLK0_SRC					107
125#define CAMCLK0_CLK					108
126#define CAMCLK1_SRC					109
127#define CAMCLK1_CLK					110
128#define CAMCLK2_SRC					111
129#define CAMCLK2_CLK					112
130#define CSIPHYTIMER_SRC					113
131#define CSIPHY2_TIMER_CLK				114
132#define CSIPHY1_TIMER_CLK				115
133#define CSIPHY0_TIMER_CLK				116
134#define PLL1						117
135#define PLL2						118
136#define RGB_TV_CLK					119
137#define NPL_TV_CLK					120
138#define VCAP_AHB_CLK					121
139#define VCAP_AXI_CLK					122
140#define VCAP_SRC					123
141#define VCAP_CLK					124
142#define VCAP_NPL_CLK					125
143#define PLL15						126
144
145#endif
146