1#ifndef _PARISC_PDC_H
2#define _PARISC_PDC_H
3
4#include <uapi/asm/pdc.h>
5
6#if !defined(__ASSEMBLY__)
7
8extern int pdc_type;
9
10/* Values for pdc_type */
11#define PDC_TYPE_ILLEGAL	-1
12#define PDC_TYPE_PAT		 0 /* 64-bit PAT-PDC */
13#define PDC_TYPE_SYSTEM_MAP	 1 /* 32-bit, but supports PDC_SYSTEM_MAP */
14#define PDC_TYPE_SNAKE		 2 /* Doesn't support SYSTEM_MAP */
15
16struct pdc_chassis_info {       /* for PDC_CHASSIS_INFO */
17	unsigned long actcnt;   /* actual number of bytes returned */
18	unsigned long maxcnt;   /* maximum number of bytes that could be returned */
19};
20
21struct pdc_coproc_cfg {         /* for PDC_COPROC_CFG */
22        unsigned long ccr_functional;
23        unsigned long ccr_present;
24        unsigned long revision;
25        unsigned long model;
26};
27
28struct pdc_model {		/* for PDC_MODEL */
29	unsigned long hversion;
30	unsigned long sversion;
31	unsigned long hw_id;
32	unsigned long boot_id;
33	unsigned long sw_id;
34	unsigned long sw_cap;
35	unsigned long arch_rev;
36	unsigned long pot_key;
37	unsigned long curr_key;
38};
39
40struct pdc_cache_cf {		/* for PDC_CACHE  (I/D-caches) */
41    unsigned long
42#ifdef CONFIG_64BIT
43		cc_padW:32,
44#endif
45		cc_alias: 4,	/* alias boundaries for virtual addresses   */
46		cc_block: 4,	/* to determine most efficient stride */
47		cc_line	: 3,	/* maximum amount written back as a result of store (multiple of 16 bytes) */
48		cc_shift: 2,	/* how much to shift cc_block left */
49		cc_wt	: 1,	/* 0 = WT-Dcache, 1 = WB-Dcache */
50		cc_sh	: 2,	/* 0 = separate I/D-cache, else shared I/D-cache */
51		cc_cst  : 3,	/* 0 = incoherent D-cache, 1=coherent D-cache */
52		cc_pad1 : 10,	/* reserved */
53		cc_hv   : 3;	/* hversion dependent */
54};
55
56struct pdc_tlb_cf {		/* for PDC_CACHE (I/D-TLB's) */
57    unsigned long tc_pad0:12,	/* reserved */
58#ifdef CONFIG_64BIT
59		tc_padW:32,
60#endif
61		tc_sh	: 2,	/* 0 = separate I/D-TLB, else shared I/D-TLB */
62		tc_hv   : 1,	/* HV */
63		tc_page : 1,	/* 0 = 2K page-size-machine, 1 = 4k page size */
64		tc_cst  : 3,	/* 0 = incoherent operations, else coherent operations */
65		tc_aid  : 5,	/* ITLB: width of access ids of processor (encoded!) */
66		tc_pad1 : 8;	/* ITLB: width of space-registers (encoded) */
67};
68
69struct pdc_cache_info {		/* main-PDC_CACHE-structure (caches & TLB's) */
70	/* I-cache */
71	unsigned long	ic_size;	/* size in bytes */
72	struct pdc_cache_cf ic_conf;	/* configuration */
73	unsigned long	ic_base;	/* base-addr */
74	unsigned long	ic_stride;
75	unsigned long	ic_count;
76	unsigned long	ic_loop;
77	/* D-cache */
78	unsigned long	dc_size;	/* size in bytes */
79	struct pdc_cache_cf dc_conf;	/* configuration */
80	unsigned long	dc_base;	/* base-addr */
81	unsigned long	dc_stride;
82	unsigned long	dc_count;
83	unsigned long	dc_loop;
84	/* Instruction-TLB */
85	unsigned long	it_size;	/* number of entries in I-TLB */
86	struct pdc_tlb_cf it_conf;	/* I-TLB-configuration */
87	unsigned long	it_sp_base;
88	unsigned long	it_sp_stride;
89	unsigned long	it_sp_count;
90	unsigned long	it_off_base;
91	unsigned long	it_off_stride;
92	unsigned long	it_off_count;
93	unsigned long	it_loop;
94	/* data-TLB */
95	unsigned long	dt_size;	/* number of entries in D-TLB */
96	struct pdc_tlb_cf dt_conf;	/* D-TLB-configuration */
97	unsigned long	dt_sp_base;
98	unsigned long	dt_sp_stride;
99	unsigned long	dt_sp_count;
100	unsigned long	dt_off_base;
101	unsigned long	dt_off_stride;
102	unsigned long	dt_off_count;
103	unsigned long	dt_loop;
104};
105
106#if 0
107/* If you start using the next struct, you'll have to adjust it to
108 * work with 64-bit firmware I think -PB
109 */
110struct pdc_iodc {     /* PDC_IODC */
111	unsigned char   hversion_model;
112	unsigned char 	hversion;
113	unsigned char 	spa;
114	unsigned char 	type;
115	unsigned int	sversion_rev:4;
116	unsigned int	sversion_model:19;
117	unsigned int	sversion_opt:8;
118	unsigned char	rev;
119	unsigned char	dep;
120	unsigned char	features;
121	unsigned char	pad1;
122	unsigned int	checksum:16;
123	unsigned int	length:16;
124	unsigned int    pad[15];
125} __attribute__((aligned(8))) ;
126#endif
127
128#ifndef CONFIG_PA20
129/* no BLTBs in pa2.0 processors */
130struct pdc_btlb_info_range {
131	__u8 res00;
132	__u8 num_i;
133	__u8 num_d;
134	__u8 num_comb;
135};
136
137struct pdc_btlb_info {	/* PDC_BLOCK_TLB, return of PDC_BTLB_INFO */
138	unsigned int min_size;	/* minimum size of BTLB in pages */
139	unsigned int max_size;	/* maximum size of BTLB in pages */
140	struct pdc_btlb_info_range fixed_range_info;
141	struct pdc_btlb_info_range variable_range_info;
142};
143
144#endif /* !CONFIG_PA20 */
145
146#ifdef CONFIG_64BIT
147struct pdc_memory_table_raddr { /* PDC_MEM/PDC_MEM_TABLE (return info) */
148	unsigned long entries_returned;
149	unsigned long entries_total;
150};
151
152struct pdc_memory_table {       /* PDC_MEM/PDC_MEM_TABLE (arguments) */
153	unsigned long paddr;
154	unsigned int  pages;
155	unsigned int  reserved;
156};
157#endif /* CONFIG_64BIT */
158
159struct pdc_system_map_mod_info { /* PDC_SYSTEM_MAP/FIND_MODULE */
160	unsigned long mod_addr;
161	unsigned long mod_pgs;
162	unsigned long add_addrs;
163};
164
165struct pdc_system_map_addr_info { /* PDC_SYSTEM_MAP/FIND_ADDRESS */
166	unsigned long mod_addr;
167	unsigned long mod_pgs;
168};
169
170struct pdc_initiator { /* PDC_INITIATOR */
171	int host_id;
172	int factor;
173	int width;
174	int mode;
175};
176
177struct hardware_path {
178	char  flags;	/* see bit definitions below */
179	char  bc[6];	/* Bus Converter routing info to a specific */
180			/* I/O adaptor (< 0 means none, > 63 resvd) */
181	char  mod;	/* fixed field of specified module */
182};
183
184/*
185 * Device path specifications used by PDC.
186 */
187struct pdc_module_path {
188	struct hardware_path path;
189	unsigned int layers[6]; /* device-specific info (ctlr #, unit # ...) */
190};
191
192#ifndef CONFIG_PA20
193/* Only used on some pre-PA2.0 boxes */
194struct pdc_memory_map {		/* PDC_MEMORY_MAP */
195	unsigned long hpa;	/* mod's register set address */
196	unsigned long more_pgs;	/* number of additional I/O pgs */
197};
198#endif
199
200struct pdc_tod {
201	unsigned long tod_sec;
202	unsigned long tod_usec;
203};
204
205/* architected results from PDC_PIM/transfer hpmc on a PA1.1 machine */
206
207struct pdc_hpmc_pim_11 { /* PDC_PIM */
208	__u32 gr[32];
209	__u32 cr[32];
210	__u32 sr[8];
211	__u32 iasq_back;
212	__u32 iaoq_back;
213	__u32 check_type;
214	__u32 cpu_state;
215	__u32 rsvd1;
216	__u32 cache_check;
217	__u32 tlb_check;
218	__u32 bus_check;
219	__u32 assists_check;
220	__u32 rsvd2;
221	__u32 assist_state;
222	__u32 responder_addr;
223	__u32 requestor_addr;
224	__u32 path_info;
225	__u64 fr[32];
226};
227
228/*
229 * architected results from PDC_PIM/transfer hpmc on a PA2.0 machine
230 *
231 * Note that PDC_PIM doesn't care whether or not wide mode was enabled
232 * so the results are different on  PA1.1 vs. PA2.0 when in narrow mode.
233 *
234 * Note also that there are unarchitected results available, which
235 * are hversion dependent. Do a "ser pim 0 hpmc" after rebooting, since
236 * the firmware is probably the best way of printing hversion dependent
237 * data.
238 */
239
240struct pdc_hpmc_pim_20 { /* PDC_PIM */
241	__u64 gr[32];
242	__u64 cr[32];
243	__u64 sr[8];
244	__u64 iasq_back;
245	__u64 iaoq_back;
246	__u32 check_type;
247	__u32 cpu_state;
248	__u32 cache_check;
249	__u32 tlb_check;
250	__u32 bus_check;
251	__u32 assists_check;
252	__u32 assist_state;
253	__u32 path_info;
254	__u64 responder_addr;
255	__u64 requestor_addr;
256	__u64 fr[32];
257};
258
259void pdc_console_init(void);	/* in pdc_console.c */
260void pdc_console_restart(void);
261
262void setup_pdc(void);		/* in inventory.c */
263
264/* wrapper-functions from pdc.c */
265
266int pdc_add_valid(unsigned long address);
267int pdc_chassis_info(struct pdc_chassis_info *chassis_info, void *led_info, unsigned long len);
268int pdc_chassis_disp(unsigned long disp);
269int pdc_chassis_warn(unsigned long *warn);
270int pdc_coproc_cfg(struct pdc_coproc_cfg *pdc_coproc_info);
271int pdc_coproc_cfg_unlocked(struct pdc_coproc_cfg *pdc_coproc_info);
272int pdc_iodc_read(unsigned long *actcnt, unsigned long hpa, unsigned int index,
273		  void *iodc_data, unsigned int iodc_data_size);
274int pdc_system_map_find_mods(struct pdc_system_map_mod_info *pdc_mod_info,
275			     struct pdc_module_path *mod_path, long mod_index);
276int pdc_system_map_find_addrs(struct pdc_system_map_addr_info *pdc_addr_info,
277			      long mod_index, long addr_index);
278int pdc_model_info(struct pdc_model *model);
279int pdc_model_sysmodel(char *name);
280int pdc_model_cpuid(unsigned long *cpu_id);
281int pdc_model_versions(unsigned long *versions, int id);
282int pdc_model_capabilities(unsigned long *capabilities);
283int pdc_cache_info(struct pdc_cache_info *cache);
284int pdc_spaceid_bits(unsigned long *space_bits);
285#ifndef CONFIG_PA20
286int pdc_btlb_info(struct pdc_btlb_info *btlb);
287int pdc_mem_map_hpa(struct pdc_memory_map *r_addr, struct pdc_module_path *mod_path);
288#endif /* !CONFIG_PA20 */
289int pdc_lan_station_id(char *lan_addr, unsigned long net_hpa);
290
291int pdc_stable_read(unsigned long staddr, void *memaddr, unsigned long count);
292int pdc_stable_write(unsigned long staddr, void *memaddr, unsigned long count);
293int pdc_stable_get_size(unsigned long *size);
294int pdc_stable_verify_contents(void);
295int pdc_stable_initialize(void);
296
297int pdc_pci_irt_size(unsigned long *num_entries, unsigned long hpa);
298int pdc_pci_irt(unsigned long num_entries, unsigned long hpa, void *tbl);
299
300int pdc_get_initiator(struct hardware_path *, struct pdc_initiator *);
301int pdc_tod_read(struct pdc_tod *tod);
302int pdc_tod_set(unsigned long sec, unsigned long usec);
303
304#ifdef CONFIG_64BIT
305int pdc_mem_mem_table(struct pdc_memory_table_raddr *r_addr,
306		struct pdc_memory_table *tbl, unsigned long entries);
307#endif
308
309void set_firmware_width(void);
310void set_firmware_width_unlocked(void);
311int pdc_do_firm_test_reset(unsigned long ftc_bitmap);
312int pdc_do_reset(void);
313int pdc_soft_power_info(unsigned long *power_reg);
314int pdc_soft_power_button(int sw_control);
315void pdc_io_reset(void);
316void pdc_io_reset_devices(void);
317int pdc_iodc_getc(void);
318int pdc_iodc_print(const unsigned char *str, unsigned count);
319
320void pdc_emergency_unlock(void);
321int pdc_sti_call(unsigned long func, unsigned long flags,
322                 unsigned long inptr, unsigned long outputr,
323                 unsigned long glob_cfg);
324
325static inline char * os_id_to_string(u16 os_id) {
326	switch(os_id) {
327	case OS_ID_NONE:	return "No OS";
328	case OS_ID_HPUX:	return "HP-UX";
329	case OS_ID_MPEXL:	return "MPE-iX";
330	case OS_ID_OSF:		return "OSF";
331	case OS_ID_HPRT:	return "HP-RT";
332	case OS_ID_NOVEL:	return "Novell Netware";
333	case OS_ID_LINUX:	return "Linux";
334	default:	return "Unknown";
335	}
336}
337
338#endif /* !defined(__ASSEMBLY__) */
339#endif /* _PARISC_PDC_H */
340