1/*
2 *  Copyright (C) NEC Electronics Corporation 2004-2006
3 *
4 *  This file is based on the arch/mips/ddb5xxx/ddb5477/pci.c
5 *
6 *	Copyright 2001 MontaVista Software Inc.
7 *
8 *  This program is free software; you can redistribute it and/or modify
9 *  it under the terms of the GNU General Public License as published by
10 *  the Free Software Foundation; either version 2 of the License, or
11 *  (at your option) any later version.
12 *
13 *  This program is distributed in the hope that it will be useful,
14 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
15 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16 *  GNU General Public License for more details.
17 *
18 *  You should have received a copy of the GNU General Public License
19 *  along with this program; if not, write to the Free Software
20 *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
21 */
22
23#include <linux/kernel.h>
24#include <linux/init.h>
25#include <linux/types.h>
26#include <linux/pci.h>
27
28#include <asm/bootinfo.h>
29
30#include <asm/emma/emma2rh.h>
31
32static struct resource pci_io_resource = {
33	.name = "pci IO space",
34	.start = EMMA2RH_PCI_IO_BASE,
35	.end = EMMA2RH_PCI_IO_BASE + EMMA2RH_PCI_IO_SIZE - 1,
36	.flags = IORESOURCE_IO,
37};
38
39static struct resource pci_mem_resource = {
40	.name = "pci memory space",
41	.start = EMMA2RH_PCI_MEM_BASE,
42	.end = EMMA2RH_PCI_MEM_BASE + EMMA2RH_PCI_MEM_SIZE - 1,
43	.flags = IORESOURCE_MEM,
44};
45
46extern struct pci_ops emma2rh_pci_ops;
47
48static struct pci_controller emma2rh_pci_controller = {
49	.pci_ops = &emma2rh_pci_ops,
50	.mem_resource = &pci_mem_resource,
51	.io_resource = &pci_io_resource,
52	.mem_offset = -0x04000000,
53	.io_offset = 0,
54};
55
56static void __init emma2rh_pci_init(void)
57{
58	/* setup PCI interface */
59	emma2rh_out32(EMMA2RH_PCI_ARBIT_CTR, 0x70f);
60
61	emma2rh_out32(EMMA2RH_PCI_IWIN0_CTR, 0x80000a18);
62	emma2rh_out32(EMMA2RH_PCI_CONFIG_BASE + PCI_COMMAND,
63		      PCI_STATUS_DEVSEL_MEDIUM | PCI_STATUS_CAP_LIST |
64		      PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);
65	emma2rh_out32(EMMA2RH_PCI_CONFIG_BASE + PCI_BASE_ADDRESS_0, 0x10000000);
66	emma2rh_out32(EMMA2RH_PCI_CONFIG_BASE + PCI_BASE_ADDRESS_1, 0x00000000);
67
68	emma2rh_out32(EMMA2RH_PCI_IWIN0_CTR, 0x12000000 | 0x218);
69	emma2rh_out32(EMMA2RH_PCI_IWIN1_CTR, 0x18000000 | 0x600);
70	emma2rh_out32(EMMA2RH_PCI_INIT_ESWP, 0x00000200);
71
72	emma2rh_out32(EMMA2RH_PCI_TWIN_CTR, 0x00009200);
73	emma2rh_out32(EMMA2RH_PCI_TWIN_BADR, 0x00000000);
74	emma2rh_out32(EMMA2RH_PCI_TWIN0_DADR, 0x00000000);
75	emma2rh_out32(EMMA2RH_PCI_TWIN1_DADR, 0x00000000);
76}
77
78static int __init emma2rh_pci_setup(void)
79{
80	emma2rh_pci_init();
81	register_pci_controller(&emma2rh_pci_controller);
82	return 0;
83}
84
85arch_initcall(emma2rh_pci_setup);
86