1/* 2 * This program is free software; you can redistribute it and/or modify it 3 * under the terms of the GNU General Public License version 2 as published 4 * by the Free Software Foundation. 5 * 6 * Copyright (C) 2010 John Crispin <blogic@openwrt.org> 7 */ 8 9#include <linux/init.h> 10#include <linux/io.h> 11#include <linux/ioport.h> 12#include <linux/pm.h> 13#include <linux/export.h> 14#include <linux/delay.h> 15#include <linux/of_address.h> 16#include <linux/of_platform.h> 17#include <linux/reset-controller.h> 18 19#include <asm/reboot.h> 20 21#include <lantiq_soc.h> 22 23#include "../prom.h" 24 25#define ltq_rcu_w32(x, y) ltq_w32((x), ltq_rcu_membase + (y)) 26#define ltq_rcu_r32(x) ltq_r32(ltq_rcu_membase + (x)) 27 28/* reset request register */ 29#define RCU_RST_REQ 0x0010 30/* reset status register */ 31#define RCU_RST_STAT 0x0014 32/* vr9 gphy registers */ 33#define RCU_GFS_ADD0_XRX200 0x0020 34#define RCU_GFS_ADD1_XRX200 0x0068 35 36/* reboot bit */ 37#define RCU_RD_GPHY0_XRX200 BIT(31) 38#define RCU_RD_SRST BIT(30) 39#define RCU_RD_GPHY1_XRX200 BIT(29) 40 41/* reset cause */ 42#define RCU_STAT_SHIFT 26 43/* boot selection */ 44#define RCU_BOOT_SEL(x) ((x >> 18) & 0x7) 45#define RCU_BOOT_SEL_XRX200(x) (((x >> 17) & 0xf) | ((x >> 8) & 0x10)) 46 47/* remapped base addr of the reset control unit */ 48static void __iomem *ltq_rcu_membase; 49static struct device_node *ltq_rcu_np; 50 51/* This function is used by the watchdog driver */ 52int ltq_reset_cause(void) 53{ 54 u32 val = ltq_rcu_r32(RCU_RST_STAT); 55 return val >> RCU_STAT_SHIFT; 56} 57EXPORT_SYMBOL_GPL(ltq_reset_cause); 58 59/* allow platform code to find out what source we booted from */ 60unsigned char ltq_boot_select(void) 61{ 62 u32 val = ltq_rcu_r32(RCU_RST_STAT); 63 64 if (of_device_is_compatible(ltq_rcu_np, "lantiq,rcu-xrx200")) 65 return RCU_BOOT_SEL_XRX200(val); 66 67 return RCU_BOOT_SEL(val); 68} 69 70/* reset / boot a gphy */ 71static struct ltq_xrx200_gphy_reset { 72 u32 rd; 73 u32 addr; 74} xrx200_gphy[] = { 75 {RCU_RD_GPHY0_XRX200, RCU_GFS_ADD0_XRX200}, 76 {RCU_RD_GPHY1_XRX200, RCU_GFS_ADD1_XRX200}, 77}; 78 79/* reset and boot a gphy. these phys only exist on xrx200 SoC */ 80int xrx200_gphy_boot(struct device *dev, unsigned int id, dma_addr_t dev_addr) 81{ 82 struct clk *clk; 83 84 if (!of_device_is_compatible(ltq_rcu_np, "lantiq,rcu-xrx200")) { 85 dev_err(dev, "this SoC has no GPHY\n"); 86 return -EINVAL; 87 } 88 89 clk = clk_get_sys("1f203000.rcu", "gphy"); 90 if (IS_ERR(clk)) 91 return PTR_ERR(clk); 92 93 clk_enable(clk); 94 95 if (id > 1) { 96 dev_err(dev, "%u is an invalid gphy id\n", id); 97 return -EINVAL; 98 } 99 dev_info(dev, "booting GPHY%u firmware at %X\n", id, dev_addr); 100 101 ltq_rcu_w32(ltq_rcu_r32(RCU_RST_REQ) | xrx200_gphy[id].rd, 102 RCU_RST_REQ); 103 ltq_rcu_w32(dev_addr, xrx200_gphy[id].addr); 104 ltq_rcu_w32(ltq_rcu_r32(RCU_RST_REQ) & ~xrx200_gphy[id].rd, 105 RCU_RST_REQ); 106 return 0; 107} 108 109/* reset a io domain for u micro seconds */ 110void ltq_reset_once(unsigned int module, ulong u) 111{ 112 ltq_rcu_w32(ltq_rcu_r32(RCU_RST_REQ) | module, RCU_RST_REQ); 113 udelay(u); 114 ltq_rcu_w32(ltq_rcu_r32(RCU_RST_REQ) & ~module, RCU_RST_REQ); 115} 116 117static int ltq_assert_device(struct reset_controller_dev *rcdev, 118 unsigned long id) 119{ 120 u32 val; 121 122 if (id < 8) 123 return -1; 124 125 val = ltq_rcu_r32(RCU_RST_REQ); 126 val |= BIT(id); 127 ltq_rcu_w32(val, RCU_RST_REQ); 128 129 return 0; 130} 131 132static int ltq_deassert_device(struct reset_controller_dev *rcdev, 133 unsigned long id) 134{ 135 u32 val; 136 137 if (id < 8) 138 return -1; 139 140 val = ltq_rcu_r32(RCU_RST_REQ); 141 val &= ~BIT(id); 142 ltq_rcu_w32(val, RCU_RST_REQ); 143 144 return 0; 145} 146 147static int ltq_reset_device(struct reset_controller_dev *rcdev, 148 unsigned long id) 149{ 150 ltq_assert_device(rcdev, id); 151 return ltq_deassert_device(rcdev, id); 152} 153 154static struct reset_control_ops reset_ops = { 155 .reset = ltq_reset_device, 156 .assert = ltq_assert_device, 157 .deassert = ltq_deassert_device, 158}; 159 160static struct reset_controller_dev reset_dev = { 161 .ops = &reset_ops, 162 .owner = THIS_MODULE, 163 .nr_resets = 32, 164 .of_reset_n_cells = 1, 165}; 166 167void ltq_rst_init(void) 168{ 169 reset_dev.of_node = of_find_compatible_node(NULL, NULL, 170 "lantiq,xway-reset"); 171 if (!reset_dev.of_node) 172 pr_err("Failed to find reset controller node"); 173 else 174 reset_controller_register(&reset_dev); 175} 176 177static void ltq_machine_restart(char *command) 178{ 179 u32 val = ltq_rcu_r32(RCU_RST_REQ); 180 181 if (of_device_is_compatible(ltq_rcu_np, "lantiq,rcu-xrx200")) 182 val |= RCU_RD_GPHY1_XRX200 | RCU_RD_GPHY0_XRX200; 183 184 val |= RCU_RD_SRST; 185 186 local_irq_disable(); 187 ltq_rcu_w32(val, RCU_RST_REQ); 188 unreachable(); 189} 190 191static void ltq_machine_halt(void) 192{ 193 local_irq_disable(); 194 unreachable(); 195} 196 197static void ltq_machine_power_off(void) 198{ 199 local_irq_disable(); 200 unreachable(); 201} 202 203static int __init mips_reboot_setup(void) 204{ 205 struct resource res; 206 207 ltq_rcu_np = of_find_compatible_node(NULL, NULL, "lantiq,rcu-xway"); 208 if (!ltq_rcu_np) 209 ltq_rcu_np = of_find_compatible_node(NULL, NULL, 210 "lantiq,rcu-xrx200"); 211 212 /* check if all the reset register range is available */ 213 if (!ltq_rcu_np) 214 panic("Failed to load reset resources from devicetree"); 215 216 if (of_address_to_resource(ltq_rcu_np, 0, &res)) 217 panic("Failed to get rcu memory range"); 218 219 if (request_mem_region(res.start, resource_size(&res), res.name) < 0) 220 pr_err("Failed to request rcu memory"); 221 222 ltq_rcu_membase = ioremap_nocache(res.start, resource_size(&res)); 223 if (!ltq_rcu_membase) 224 panic("Failed to remap core memory"); 225 226 _machine_restart = ltq_machine_restart; 227 _machine_halt = ltq_machine_halt; 228 pm_power_off = ltq_machine_power_off; 229 230 return 0; 231} 232 233arch_initcall(mips_reboot_setup); 234