1/ {
2	#address-cells = <1>;
3	#size-cells = <1>;
4	compatible = "brcm,bcm6368";
5
6	cpus {
7		#address-cells = <1>;
8		#size-cells = <0>;
9
10		mips-hpt-frequency = <200000000>;
11
12		cpu@0 {
13			compatible = "brcm,bmips4350";
14			device_type = "cpu";
15			reg = <0>;
16		};
17
18		cpu@1 {
19			compatible = "brcm,bmips4350";
20			device_type = "cpu";
21			reg = <1>;
22		};
23
24	};
25
26	clocks {
27		periph_clk: periph_clk {
28			compatible = "fixed-clock";
29			#clock-cells = <0>;
30			clock-frequency = <50000000>;
31		};
32	};
33
34	aliases {
35		uart0 = &uart0;
36	};
37
38	cpu_intc: cpu_intc {
39		#address-cells = <0>;
40		compatible = "mti,cpu-interrupt-controller";
41
42		interrupt-controller;
43		#interrupt-cells = <1>;
44	};
45
46	ubus {
47		#address-cells = <1>;
48		#size-cells = <1>;
49
50		compatible = "simple-bus";
51		ranges;
52
53		periph_intc: periph_intc@10000020 {
54			compatible = "brcm,bcm3380-l2-intc";
55			reg = <0x10000024 0x4 0x1000002c 0x4>,
56			      <0x10000020 0x4 0x10000028 0x4>;
57
58			interrupt-controller;
59			#interrupt-cells = <1>;
60
61			interrupt-parent = <&cpu_intc>;
62			interrupts = <2>;
63		};
64
65		uart0: serial@10000100 {
66			compatible = "brcm,bcm6345-uart";
67			reg = <0x10000100 0x18>;
68			interrupt-parent = <&periph_intc>;
69			interrupts = <2>;
70			clocks = <&periph_clk>;
71			status = "disabled";
72		};
73
74		ehci0: usb@10001500 {
75			compatible = "brcm,bcm6368-ehci", "generic-ehci";
76			reg = <0x10001500 0x100>;
77			big-endian;
78			interrupt-parent = <&periph_intc>;
79			interrupts = <7>;
80			status = "disabled";
81		};
82
83		ohci0: usb@10001600 {
84			compatible = "brcm,bcm6368-ohci", "generic-ohci";
85			reg = <0x10001600 0x100>;
86			big-endian;
87			no-big-frame-no;
88			interrupt-parent = <&periph_intc>;
89			interrupts = <5>;
90			status = "disabled";
91		};
92	};
93};
94