1/***************************************************************************/
2
3/*
4 *	m523x.c  -- platform support for ColdFire 523x based boards
5 *
6 *	Sub-architcture dependent initialization code for the Freescale
7 *	523x CPUs.
8 *
9 *	Copyright (C) 1999-2005, Greg Ungerer (gerg@snapgear.com)
10 *	Copyright (C) 2001-2003, SnapGear Inc. (www.snapgear.com)
11 */
12
13/***************************************************************************/
14
15#include <linux/kernel.h>
16#include <linux/param.h>
17#include <linux/init.h>
18#include <linux/io.h>
19#include <asm/machdep.h>
20#include <asm/coldfire.h>
21#include <asm/mcfsim.h>
22#include <asm/mcfclk.h>
23
24/***************************************************************************/
25
26DEFINE_CLK(pll, "pll.0", MCF_CLK);
27DEFINE_CLK(sys, "sys.0", MCF_BUSCLK);
28DEFINE_CLK(mcfpit0, "mcfpit.0", MCF_CLK);
29DEFINE_CLK(mcfpit1, "mcfpit.1", MCF_CLK);
30DEFINE_CLK(mcfpit2, "mcfpit.2", MCF_CLK);
31DEFINE_CLK(mcfpit3, "mcfpit.3", MCF_CLK);
32DEFINE_CLK(mcfuart0, "mcfuart.0", MCF_BUSCLK);
33DEFINE_CLK(mcfuart1, "mcfuart.1", MCF_BUSCLK);
34DEFINE_CLK(mcfuart2, "mcfuart.2", MCF_BUSCLK);
35DEFINE_CLK(mcfqspi0, "mcfqspi.0", MCF_BUSCLK);
36DEFINE_CLK(fec0, "fec.0", MCF_BUSCLK);
37
38struct clk *mcf_clks[] = {
39	&clk_pll,
40	&clk_sys,
41	&clk_mcfpit0,
42	&clk_mcfpit1,
43	&clk_mcfpit2,
44	&clk_mcfpit3,
45	&clk_mcfuart0,
46	&clk_mcfuart1,
47	&clk_mcfuart2,
48	&clk_mcfqspi0,
49	&clk_fec0,
50	NULL
51};
52
53/***************************************************************************/
54
55static void __init m523x_qspi_init(void)
56{
57#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)
58	u16 par;
59
60	/* setup QSPS pins for QSPI with gpio CS control */
61	writeb(0x1f, MCFGPIO_PAR_QSPI);
62	/* and CS2 & CS3 as gpio */
63	par = readw(MCFGPIO_PAR_TIMER);
64	par &= 0x3f3f;
65	writew(par, MCFGPIO_PAR_TIMER);
66#endif /* IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) */
67}
68
69/***************************************************************************/
70
71static void __init m523x_fec_init(void)
72{
73	/* Set multi-function pins to ethernet use */
74	writeb(readb(MCFGPIO_PAR_FECI2C) | 0xf0, MCFGPIO_PAR_FECI2C);
75}
76
77/***************************************************************************/
78
79void __init config_BSP(char *commandp, int size)
80{
81	mach_sched_init = hw_timer_init;
82	m523x_fec_init();
83	m523x_qspi_init();
84}
85
86/***************************************************************************/
87