1/* cpu-irqs.h: on-CPU peripheral irqs
2 *
3 * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_CPU_IRQS_H
13#define _ASM_CPU_IRQS_H
14
15#ifndef __ASSEMBLY__
16
17/* IRQ to level mappings */
18#define IRQ_GDBSTUB_LEVEL	15
19#define IRQ_UART_LEVEL		13
20
21#ifdef CONFIG_GDBSTUB_UART0
22#define IRQ_UART0_LEVEL		IRQ_GDBSTUB_LEVEL
23#else
24#define IRQ_UART0_LEVEL		IRQ_UART_LEVEL
25#endif
26
27#ifdef CONFIG_GDBSTUB_UART1
28#define IRQ_UART1_LEVEL		IRQ_GDBSTUB_LEVEL
29#else
30#define IRQ_UART1_LEVEL		IRQ_UART_LEVEL
31#endif
32
33#define IRQ_DMA0_LEVEL		14
34#define IRQ_DMA1_LEVEL		14
35#define IRQ_DMA2_LEVEL		14
36#define IRQ_DMA3_LEVEL		14
37#define IRQ_DMA4_LEVEL		14
38#define IRQ_DMA5_LEVEL		14
39#define IRQ_DMA6_LEVEL		14
40#define IRQ_DMA7_LEVEL		14
41
42#define IRQ_TIMER0_LEVEL	12
43#define IRQ_TIMER1_LEVEL	11
44#define IRQ_TIMER2_LEVEL	10
45
46#define IRQ_XIRQ0_LEVEL		1
47#define IRQ_XIRQ1_LEVEL		2
48#define IRQ_XIRQ2_LEVEL		3
49#define IRQ_XIRQ3_LEVEL		4
50#define IRQ_XIRQ4_LEVEL		5
51#define IRQ_XIRQ5_LEVEL		6
52#define IRQ_XIRQ6_LEVEL		7
53#define IRQ_XIRQ7_LEVEL		8
54
55/* IRQ IDs presented to drivers */
56#define IRQ_CPU__UNUSED		IRQ_BASE_CPU
57#define IRQ_CPU_UART0		(IRQ_BASE_CPU + IRQ_UART0_LEVEL)
58#define IRQ_CPU_UART1		(IRQ_BASE_CPU + IRQ_UART1_LEVEL)
59#define IRQ_CPU_TIMER0		(IRQ_BASE_CPU + IRQ_TIMER0_LEVEL)
60#define IRQ_CPU_TIMER1		(IRQ_BASE_CPU + IRQ_TIMER1_LEVEL)
61#define IRQ_CPU_TIMER2		(IRQ_BASE_CPU + IRQ_TIMER2_LEVEL)
62#define IRQ_CPU_DMA0		(IRQ_BASE_CPU + IRQ_DMA0_LEVEL)
63#define IRQ_CPU_DMA1		(IRQ_BASE_CPU + IRQ_DMA1_LEVEL)
64#define IRQ_CPU_DMA2		(IRQ_BASE_CPU + IRQ_DMA2_LEVEL)
65#define IRQ_CPU_DMA3		(IRQ_BASE_CPU + IRQ_DMA3_LEVEL)
66#define IRQ_CPU_DMA4		(IRQ_BASE_CPU + IRQ_DMA4_LEVEL)
67#define IRQ_CPU_DMA5		(IRQ_BASE_CPU + IRQ_DMA5_LEVEL)
68#define IRQ_CPU_DMA6		(IRQ_BASE_CPU + IRQ_DMA6_LEVEL)
69#define IRQ_CPU_DMA7		(IRQ_BASE_CPU + IRQ_DMA7_LEVEL)
70#define IRQ_CPU_EXTERNAL0	(IRQ_BASE_CPU + IRQ_XIRQ0_LEVEL)
71#define IRQ_CPU_EXTERNAL1	(IRQ_BASE_CPU + IRQ_XIRQ1_LEVEL)
72#define IRQ_CPU_EXTERNAL2	(IRQ_BASE_CPU + IRQ_XIRQ2_LEVEL)
73#define IRQ_CPU_EXTERNAL3	(IRQ_BASE_CPU + IRQ_XIRQ3_LEVEL)
74#define IRQ_CPU_EXTERNAL4	(IRQ_BASE_CPU + IRQ_XIRQ4_LEVEL)
75#define IRQ_CPU_EXTERNAL5	(IRQ_BASE_CPU + IRQ_XIRQ5_LEVEL)
76#define IRQ_CPU_EXTERNAL6	(IRQ_BASE_CPU + IRQ_XIRQ6_LEVEL)
77#define IRQ_CPU_EXTERNAL7	(IRQ_BASE_CPU + IRQ_XIRQ7_LEVEL)
78
79#endif /* !__ASSEMBLY__ */
80
81#endif /* _ASM_CPU_IRQS_H */
82