1/*
2 * Copyright 2004-2009 Analog Devices Inc.
3 *           2008-2009 Bluetechnix
4 *                2005 National ICT Australia (NICTA)
5 *                      Aidan Williams <aidan@nicta.com.au>
6 *
7 * Licensed under the GPL-2 or later.
8 */
9
10#include <linux/device.h>
11#include <linux/etherdevice.h>
12#include <linux/export.h>
13#include <linux/platform_device.h>
14#include <linux/mtd/mtd.h>
15#include <linux/mtd/partitions.h>
16#include <linux/mtd/physmap.h>
17#include <linux/spi/spi.h>
18#include <linux/spi/flash.h>
19#if IS_ENABLED(CONFIG_USB_ISP1362_HCD)
20#include <linux/usb/isp1362.h>
21#endif
22#include <linux/ata_platform.h>
23#include <linux/irq.h>
24#include <linux/gpio.h>
25#include <asm/dma.h>
26#include <asm/bfin5xx_spi.h>
27#include <asm/portmux.h>
28#include <asm/dpmc.h>
29#include <linux/spi/mmc_spi.h>
30
31/*
32 * Name the Board for the /proc/cpuinfo
33 */
34const char bfin_board_name[] = "Bluetechnix TCM BF537";
35
36#if IS_ENABLED(CONFIG_SPI_BFIN5XX)
37/* all SPI peripherals info goes here */
38
39#if IS_ENABLED(CONFIG_MTD_M25P80)
40static struct mtd_partition bfin_spi_flash_partitions[] = {
41	{
42		.name = "bootloader(spi)",
43		.size = 0x00020000,
44		.offset = 0,
45		.mask_flags = MTD_CAP_ROM
46	}, {
47		.name = "linux kernel(spi)",
48		.size = 0xe0000,
49		.offset = 0x20000
50	}, {
51		.name = "file system(spi)",
52		.size = 0x700000,
53		.offset = 0x00100000,
54	}
55};
56
57static struct flash_platform_data bfin_spi_flash_data = {
58	.name = "m25p80",
59	.parts = bfin_spi_flash_partitions,
60	.nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
61	.type = "m25p64",
62};
63
64/* SPI flash chip (m25p64) */
65static struct bfin5xx_spi_chip spi_flash_chip_info = {
66	.enable_dma = 0,         /* use dma transfer with this chip*/
67};
68#endif
69
70#if IS_ENABLED(CONFIG_MMC_SPI)
71static struct bfin5xx_spi_chip mmc_spi_chip_info = {
72	.enable_dma = 0,
73};
74#endif
75
76static struct spi_board_info bfin_spi_board_info[] __initdata = {
77#if IS_ENABLED(CONFIG_MTD_M25P80)
78	{
79		/* the modalias must be the same as spi device driver name */
80		.modalias = "m25p80", /* Name of spi_driver for this device */
81		.max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
82		.bus_num = 0, /* Framework bus number */
83		.chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
84		.platform_data = &bfin_spi_flash_data,
85		.controller_data = &spi_flash_chip_info,
86		.mode = SPI_MODE_3,
87	},
88#endif
89
90#if IS_ENABLED(CONFIG_SND_BF5XX_SOC_AD183X)
91	{
92		.modalias = "ad183x",
93		.max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
94		.bus_num = 0,
95		.chip_select = 4,
96	},
97#endif
98
99#if IS_ENABLED(CONFIG_MMC_SPI)
100	{
101		.modalias = "mmc_spi",
102		.max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
103		.bus_num = 0,
104		.chip_select = 1,
105		.controller_data = &mmc_spi_chip_info,
106		.mode = SPI_MODE_3,
107	},
108#endif
109};
110
111/* SPI (0) */
112static struct resource bfin_spi0_resource[] = {
113	[0] = {
114		.start = SPI0_REGBASE,
115		.end   = SPI0_REGBASE + 0xFF,
116		.flags = IORESOURCE_MEM,
117		},
118	[1] = {
119		.start = CH_SPI,
120		.end   = CH_SPI,
121		.flags = IORESOURCE_DMA,
122	},
123	[2] = {
124		.start = IRQ_SPI,
125		.end   = IRQ_SPI,
126		.flags = IORESOURCE_IRQ,
127	}
128};
129
130/* SPI controller data */
131static struct bfin5xx_spi_master bfin_spi0_info = {
132	.num_chipselect = 8,
133	.enable_dma = 1,  /* master has the ability to do dma transfer */
134	.pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
135};
136
137static struct platform_device bfin_spi0_device = {
138	.name = "bfin-spi",
139	.id = 0, /* Bus number */
140	.num_resources = ARRAY_SIZE(bfin_spi0_resource),
141	.resource = bfin_spi0_resource,
142	.dev = {
143		.platform_data = &bfin_spi0_info, /* Passed to driver */
144	},
145};
146#endif  /* spi master and devices */
147
148#if IS_ENABLED(CONFIG_RTC_DRV_BFIN)
149static struct platform_device rtc_device = {
150	.name = "rtc-bfin",
151	.id   = -1,
152};
153#endif
154
155#if IS_ENABLED(CONFIG_FB_HITACHI_TX09)
156static struct platform_device hitachi_fb_device = {
157	.name = "hitachi-tx09",
158};
159#endif
160
161#if IS_ENABLED(CONFIG_SMC91X)
162#include <linux/smc91x.h>
163
164static struct smc91x_platdata smc91x_info = {
165	.flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
166	.leda = RPC_LED_100_10,
167	.ledb = RPC_LED_TX_RX,
168};
169
170static struct resource smc91x_resources[] = {
171	{
172		.start = 0x20200300,
173		.end = 0x20200300 + 16,
174		.flags = IORESOURCE_MEM,
175	}, {
176		.start = IRQ_PF14,
177		.end = IRQ_PF14,
178		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
179		},
180};
181
182static struct platform_device smc91x_device = {
183	.name = "smc91x",
184	.id = 0,
185	.num_resources = ARRAY_SIZE(smc91x_resources),
186	.resource = smc91x_resources,
187	.dev	= {
188		.platform_data	= &smc91x_info,
189	},
190};
191#endif
192
193#if IS_ENABLED(CONFIG_USB_ISP1362_HCD)
194static struct resource isp1362_hcd_resources[] = {
195	{
196		.start = 0x20308000,
197		.end = 0x20308000,
198		.flags = IORESOURCE_MEM,
199	}, {
200		.start = 0x20308004,
201		.end = 0x20308004,
202		.flags = IORESOURCE_MEM,
203	}, {
204		.start = IRQ_PG15,
205		.end = IRQ_PG15,
206		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
207	},
208};
209
210static struct isp1362_platform_data isp1362_priv = {
211	.sel15Kres = 1,
212	.clknotstop = 0,
213	.oc_enable = 0,
214	.int_act_high = 0,
215	.int_edge_triggered = 0,
216	.remote_wakeup_connected = 0,
217	.no_power_switching = 1,
218	.power_switching_mode = 0,
219};
220
221static struct platform_device isp1362_hcd_device = {
222	.name = "isp1362-hcd",
223	.id = 0,
224	.dev = {
225		.platform_data = &isp1362_priv,
226	},
227	.num_resources = ARRAY_SIZE(isp1362_hcd_resources),
228	.resource = isp1362_hcd_resources,
229};
230#endif
231
232#if IS_ENABLED(CONFIG_USB_NET2272)
233static struct resource net2272_bfin_resources[] = {
234	{
235		.start = 0x20300000,
236		.end = 0x20300000 + 0x100,
237		.flags = IORESOURCE_MEM,
238	}, {
239		.start = IRQ_PG13,
240		.end = IRQ_PG13,
241		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
242	},
243};
244
245static struct platform_device net2272_bfin_device = {
246	.name = "net2272",
247	.id = -1,
248	.num_resources = ARRAY_SIZE(net2272_bfin_resources),
249	.resource = net2272_bfin_resources,
250};
251#endif
252
253#if IS_ENABLED(CONFIG_MTD_GPIO_ADDR)
254static struct mtd_partition cm_partitions[] = {
255	{
256		.name   = "bootloader(nor)",
257		.size   = 0x40000,
258		.offset = 0,
259	}, {
260		.name   = "linux kernel(nor)",
261		.size   = 0x100000,
262		.offset = MTDPART_OFS_APPEND,
263	}, {
264		.name   = "file system(nor)",
265		.size   = MTDPART_SIZ_FULL,
266		.offset = MTDPART_OFS_APPEND,
267	}
268};
269
270static struct physmap_flash_data cm_flash_data = {
271	.width    = 2,
272	.parts    = cm_partitions,
273	.nr_parts = ARRAY_SIZE(cm_partitions),
274};
275
276static unsigned cm_flash_gpios[] = { GPIO_PF4, GPIO_PF5 };
277
278static struct resource cm_flash_resource[] = {
279	{
280		.name  = "cfi_probe",
281		.start = 0x20000000,
282		.end   = 0x201fffff,
283		.flags = IORESOURCE_MEM,
284	}, {
285		.start = (unsigned long)cm_flash_gpios,
286		.end   = ARRAY_SIZE(cm_flash_gpios),
287		.flags = IORESOURCE_IRQ,
288	}
289};
290
291static struct platform_device cm_flash_device = {
292	.name          = "gpio-addr-flash",
293	.id            = 0,
294	.dev = {
295		.platform_data = &cm_flash_data,
296	},
297	.num_resources = ARRAY_SIZE(cm_flash_resource),
298	.resource      = cm_flash_resource,
299};
300#endif
301
302#if IS_ENABLED(CONFIG_SERIAL_BFIN)
303#ifdef CONFIG_SERIAL_BFIN_UART0
304static struct resource bfin_uart0_resources[] = {
305	{
306		.start = UART0_THR,
307		.end = UART0_GCTL+2,
308		.flags = IORESOURCE_MEM,
309	},
310	{
311		.start = IRQ_UART0_TX,
312		.end = IRQ_UART0_TX,
313		.flags = IORESOURCE_IRQ,
314	},
315	{
316		.start = IRQ_UART0_RX,
317		.end = IRQ_UART0_RX,
318		.flags = IORESOURCE_IRQ,
319	},
320	{
321		.start = IRQ_UART0_ERROR,
322		.end = IRQ_UART0_ERROR,
323		.flags = IORESOURCE_IRQ,
324	},
325	{
326		.start = CH_UART0_TX,
327		.end = CH_UART0_TX,
328		.flags = IORESOURCE_DMA,
329	},
330	{
331		.start = CH_UART0_RX,
332		.end = CH_UART0_RX,
333		.flags = IORESOURCE_DMA,
334	},
335};
336
337static unsigned short bfin_uart0_peripherals[] = {
338	P_UART0_TX, P_UART0_RX, 0
339};
340
341static struct platform_device bfin_uart0_device = {
342	.name = "bfin-uart",
343	.id = 0,
344	.num_resources = ARRAY_SIZE(bfin_uart0_resources),
345	.resource = bfin_uart0_resources,
346	.dev = {
347		.platform_data = &bfin_uart0_peripherals, /* Passed to driver */
348	},
349};
350#endif
351#ifdef CONFIG_SERIAL_BFIN_UART1
352static struct resource bfin_uart1_resources[] = {
353	{
354		.start = UART1_THR,
355		.end = UART1_GCTL+2,
356		.flags = IORESOURCE_MEM,
357	},
358	{
359		.start = IRQ_UART1_TX,
360		.end = IRQ_UART1_TX,
361		.flags = IORESOURCE_IRQ,
362	},
363	{
364		.start = IRQ_UART1_RX,
365		.end = IRQ_UART1_RX,
366		.flags = IORESOURCE_IRQ,
367	},
368	{
369		.start = IRQ_UART1_ERROR,
370		.end = IRQ_UART1_ERROR,
371		.flags = IORESOURCE_IRQ,
372	},
373	{
374		.start = CH_UART1_TX,
375		.end = CH_UART1_TX,
376		.flags = IORESOURCE_DMA,
377	},
378	{
379		.start = CH_UART1_RX,
380		.end = CH_UART1_RX,
381		.flags = IORESOURCE_DMA,
382	},
383};
384
385static unsigned short bfin_uart1_peripherals[] = {
386	P_UART1_TX, P_UART1_RX, 0
387};
388
389static struct platform_device bfin_uart1_device = {
390	.name = "bfin-uart",
391	.id = 1,
392	.num_resources = ARRAY_SIZE(bfin_uart1_resources),
393	.resource = bfin_uart1_resources,
394	.dev = {
395		.platform_data = &bfin_uart1_peripherals, /* Passed to driver */
396	},
397};
398#endif
399#endif
400
401#if IS_ENABLED(CONFIG_BFIN_SIR)
402#ifdef CONFIG_BFIN_SIR0
403static struct resource bfin_sir0_resources[] = {
404	{
405		.start = 0xFFC00400,
406		.end = 0xFFC004FF,
407		.flags = IORESOURCE_MEM,
408	},
409	{
410		.start = IRQ_UART0_RX,
411		.end = IRQ_UART0_RX+1,
412		.flags = IORESOURCE_IRQ,
413	},
414	{
415		.start = CH_UART0_RX,
416		.end = CH_UART0_RX+1,
417		.flags = IORESOURCE_DMA,
418	},
419};
420
421static struct platform_device bfin_sir0_device = {
422	.name = "bfin_sir",
423	.id = 0,
424	.num_resources = ARRAY_SIZE(bfin_sir0_resources),
425	.resource = bfin_sir0_resources,
426};
427#endif
428#ifdef CONFIG_BFIN_SIR1
429static struct resource bfin_sir1_resources[] = {
430	{
431		.start = 0xFFC02000,
432		.end = 0xFFC020FF,
433		.flags = IORESOURCE_MEM,
434	},
435	{
436		.start = IRQ_UART1_RX,
437		.end = IRQ_UART1_RX+1,
438		.flags = IORESOURCE_IRQ,
439	},
440	{
441		.start = CH_UART1_RX,
442		.end = CH_UART1_RX+1,
443		.flags = IORESOURCE_DMA,
444	},
445};
446
447static struct platform_device bfin_sir1_device = {
448	.name = "bfin_sir",
449	.id = 1,
450	.num_resources = ARRAY_SIZE(bfin_sir1_resources),
451	.resource = bfin_sir1_resources,
452};
453#endif
454#endif
455
456#if IS_ENABLED(CONFIG_I2C_BLACKFIN_TWI)
457static const u16 bfin_twi0_pins[] = {P_TWI0_SCL, P_TWI0_SDA, 0};
458
459static struct resource bfin_twi0_resource[] = {
460	[0] = {
461		.start = TWI0_REGBASE,
462		.end   = TWI0_REGBASE,
463		.flags = IORESOURCE_MEM,
464	},
465	[1] = {
466		.start = IRQ_TWI,
467		.end   = IRQ_TWI,
468		.flags = IORESOURCE_IRQ,
469	},
470};
471
472static struct platform_device i2c_bfin_twi_device = {
473	.name = "i2c-bfin-twi",
474	.id = 0,
475	.num_resources = ARRAY_SIZE(bfin_twi0_resource),
476	.resource = bfin_twi0_resource,
477	.dev = {
478		.platform_data = &bfin_twi0_pins,
479	},
480};
481#endif
482
483#if IS_ENABLED(CONFIG_SERIAL_BFIN_SPORT)
484#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
485static struct resource bfin_sport0_uart_resources[] = {
486	{
487		.start = SPORT0_TCR1,
488		.end = SPORT0_MRCS3+4,
489		.flags = IORESOURCE_MEM,
490	},
491	{
492		.start = IRQ_SPORT0_RX,
493		.end = IRQ_SPORT0_RX+1,
494		.flags = IORESOURCE_IRQ,
495	},
496	{
497		.start = IRQ_SPORT0_ERROR,
498		.end = IRQ_SPORT0_ERROR,
499		.flags = IORESOURCE_IRQ,
500	},
501};
502
503static unsigned short bfin_sport0_peripherals[] = {
504	P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
505	P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
506};
507
508static struct platform_device bfin_sport0_uart_device = {
509	.name = "bfin-sport-uart",
510	.id = 0,
511	.num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
512	.resource = bfin_sport0_uart_resources,
513	.dev = {
514		.platform_data = &bfin_sport0_peripherals, /* Passed to driver */
515	},
516};
517#endif
518#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
519static struct resource bfin_sport1_uart_resources[] = {
520	{
521		.start = SPORT1_TCR1,
522		.end = SPORT1_MRCS3+4,
523		.flags = IORESOURCE_MEM,
524	},
525	{
526		.start = IRQ_SPORT1_RX,
527		.end = IRQ_SPORT1_RX+1,
528		.flags = IORESOURCE_IRQ,
529	},
530	{
531		.start = IRQ_SPORT1_ERROR,
532		.end = IRQ_SPORT1_ERROR,
533		.flags = IORESOURCE_IRQ,
534	},
535};
536
537static unsigned short bfin_sport1_peripherals[] = {
538	P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
539	P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
540};
541
542static struct platform_device bfin_sport1_uart_device = {
543	.name = "bfin-sport-uart",
544	.id = 1,
545	.num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
546	.resource = bfin_sport1_uart_resources,
547	.dev = {
548		.platform_data = &bfin_sport1_peripherals, /* Passed to driver */
549	},
550};
551#endif
552#endif
553
554#if IS_ENABLED(CONFIG_BFIN_MAC)
555#include <linux/bfin_mac.h>
556static const unsigned short bfin_mac_peripherals[] = P_MII0;
557
558static struct bfin_phydev_platform_data bfin_phydev_data[] = {
559	{
560		.addr = 1,
561		.irq = IRQ_MAC_PHYINT,
562	},
563};
564
565static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
566	.phydev_number = 1,
567	.phydev_data = bfin_phydev_data,
568	.phy_mode = PHY_INTERFACE_MODE_MII,
569	.mac_peripherals = bfin_mac_peripherals,
570};
571
572static struct platform_device bfin_mii_bus = {
573	.name = "bfin_mii_bus",
574	.dev = {
575		.platform_data = &bfin_mii_bus_data,
576	}
577};
578
579static struct platform_device bfin_mac_device = {
580	.name = "bfin_mac",
581	.dev = {
582		.platform_data = &bfin_mii_bus,
583	}
584};
585#endif
586
587#if IS_ENABLED(CONFIG_PATA_PLATFORM)
588#define PATA_INT	IRQ_PF14
589
590static struct pata_platform_info bfin_pata_platform_data = {
591	.ioport_shift = 2,
592};
593
594static struct resource bfin_pata_resources[] = {
595	{
596		.start = 0x2030C000,
597		.end = 0x2030C01F,
598		.flags = IORESOURCE_MEM,
599	},
600	{
601		.start = 0x2030D018,
602		.end = 0x2030D01B,
603		.flags = IORESOURCE_MEM,
604	},
605	{
606		.start = PATA_INT,
607		.end = PATA_INT,
608		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
609	},
610};
611
612static struct platform_device bfin_pata_device = {
613	.name = "pata_platform",
614	.id = -1,
615	.num_resources = ARRAY_SIZE(bfin_pata_resources),
616	.resource = bfin_pata_resources,
617	.dev = {
618		.platform_data = &bfin_pata_platform_data,
619	}
620};
621#endif
622
623static const unsigned int cclk_vlev_datasheet[] =
624{
625	VRPAIR(VLEV_085, 250000000),
626	VRPAIR(VLEV_090, 376000000),
627	VRPAIR(VLEV_095, 426000000),
628	VRPAIR(VLEV_100, 426000000),
629	VRPAIR(VLEV_105, 476000000),
630	VRPAIR(VLEV_110, 476000000),
631	VRPAIR(VLEV_115, 476000000),
632	VRPAIR(VLEV_120, 500000000),
633	VRPAIR(VLEV_125, 533000000),
634	VRPAIR(VLEV_130, 600000000),
635};
636
637static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
638	.tuple_tab = cclk_vlev_datasheet,
639	.tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
640	.vr_settling_time = 25 /* us */,
641};
642
643static struct platform_device bfin_dpmc = {
644	.name = "bfin dpmc",
645	.dev = {
646		.platform_data = &bfin_dmpc_vreg_data,
647	},
648};
649
650static struct platform_device *cm_bf537_devices[] __initdata = {
651
652	&bfin_dpmc,
653
654#if IS_ENABLED(CONFIG_FB_HITACHI_TX09)
655	&hitachi_fb_device,
656#endif
657
658#if IS_ENABLED(CONFIG_RTC_DRV_BFIN)
659	&rtc_device,
660#endif
661
662#if IS_ENABLED(CONFIG_SERIAL_BFIN)
663#ifdef CONFIG_SERIAL_BFIN_UART0
664	&bfin_uart0_device,
665#endif
666#ifdef CONFIG_SERIAL_BFIN_UART1
667	&bfin_uart1_device,
668#endif
669#endif
670
671#if IS_ENABLED(CONFIG_BFIN_SIR)
672#ifdef CONFIG_BFIN_SIR0
673	&bfin_sir0_device,
674#endif
675#ifdef CONFIG_BFIN_SIR1
676	&bfin_sir1_device,
677#endif
678#endif
679
680#if IS_ENABLED(CONFIG_I2C_BLACKFIN_TWI)
681	&i2c_bfin_twi_device,
682#endif
683
684#if IS_ENABLED(CONFIG_SERIAL_BFIN_SPORT)
685#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
686	&bfin_sport0_uart_device,
687#endif
688#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
689	&bfin_sport1_uart_device,
690#endif
691#endif
692
693#if IS_ENABLED(CONFIG_USB_ISP1362_HCD)
694	&isp1362_hcd_device,
695#endif
696
697#if IS_ENABLED(CONFIG_SMC91X)
698	&smc91x_device,
699#endif
700
701#if IS_ENABLED(CONFIG_BFIN_MAC)
702	&bfin_mii_bus,
703	&bfin_mac_device,
704#endif
705
706#if IS_ENABLED(CONFIG_USB_NET2272)
707	&net2272_bfin_device,
708#endif
709
710#if IS_ENABLED(CONFIG_SPI_BFIN5XX)
711	&bfin_spi0_device,
712#endif
713
714#if IS_ENABLED(CONFIG_PATA_PLATFORM)
715	&bfin_pata_device,
716#endif
717
718#if IS_ENABLED(CONFIG_MTD_GPIO_ADDR)
719	&cm_flash_device,
720#endif
721};
722
723static int __init net2272_init(void)
724{
725#if IS_ENABLED(CONFIG_USB_NET2272)
726	int ret;
727
728	ret = gpio_request(GPIO_PG14, "net2272");
729	if (ret)
730		return ret;
731
732	/* Reset USB Chip, PG14 */
733	gpio_direction_output(GPIO_PG14, 0);
734	mdelay(2);
735	gpio_set_value(GPIO_PG14, 1);
736#endif
737
738	return 0;
739}
740
741static int __init tcm_bf537_init(void)
742{
743	printk(KERN_INFO "%s(): registering device resources\n", __func__);
744	platform_add_devices(cm_bf537_devices, ARRAY_SIZE(cm_bf537_devices));
745#if IS_ENABLED(CONFIG_SPI_BFIN5XX)
746	spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
747#endif
748
749#if IS_ENABLED(CONFIG_PATA_PLATFORM)
750	irq_set_status_flags(PATA_INT, IRQ_NOAUTOEN);
751#endif
752
753	if (net2272_init())
754		pr_warning("unable to configure net2272; it probably won't work\n");
755
756	return 0;
757}
758
759arch_initcall(tcm_bf537_init);
760
761static struct platform_device *cm_bf537_early_devices[] __initdata = {
762#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
763#ifdef CONFIG_SERIAL_BFIN_UART0
764	&bfin_uart0_device,
765#endif
766#ifdef CONFIG_SERIAL_BFIN_UART1
767	&bfin_uart1_device,
768#endif
769#endif
770
771#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
772#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
773	&bfin_sport0_uart_device,
774#endif
775#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
776	&bfin_sport1_uart_device,
777#endif
778#endif
779};
780
781void __init native_machine_early_platform_add_devices(void)
782{
783	printk(KERN_INFO "register early platform devices\n");
784	early_platform_add_devices(cm_bf537_early_devices,
785		ARRAY_SIZE(cm_bf537_early_devices));
786}
787
788int bfin_get_ether_addr(char *addr)
789{
790	return 1;
791}
792EXPORT_SYMBOL(bfin_get_ether_addr);
793