1 /*
2 * Spin Table SMP initialisation
3 *
4 * Copyright (C) 2013 ARM Ltd.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program. If not, see <http://www.gnu.org/licenses/>.
17 */
18
19 #include <linux/delay.h>
20 #include <linux/init.h>
21 #include <linux/of.h>
22 #include <linux/smp.h>
23 #include <linux/types.h>
24
25 #include <asm/cacheflush.h>
26 #include <asm/cpu_ops.h>
27 #include <asm/cputype.h>
28 #include <asm/io.h>
29 #include <asm/smp_plat.h>
30
31 extern void secondary_holding_pen(void);
32 volatile unsigned long secondary_holding_pen_release = INVALID_HWID;
33
34 static phys_addr_t cpu_release_addr[NR_CPUS];
35
36 /*
37 * Write secondary_holding_pen_release in a way that is guaranteed to be
38 * visible to all observers, irrespective of whether they're taking part
39 * in coherency or not. This is necessary for the hotplug code to work
40 * reliably.
41 */
write_pen_release(u64 val)42 static void write_pen_release(u64 val)
43 {
44 void *start = (void *)&secondary_holding_pen_release;
45 unsigned long size = sizeof(secondary_holding_pen_release);
46
47 secondary_holding_pen_release = val;
48 __flush_dcache_area(start, size);
49 }
50
51
smp_spin_table_cpu_init(struct device_node * dn,unsigned int cpu)52 static int smp_spin_table_cpu_init(struct device_node *dn, unsigned int cpu)
53 {
54 /*
55 * Determine the address from which the CPU is polling.
56 */
57 if (of_property_read_u64(dn, "cpu-release-addr",
58 &cpu_release_addr[cpu])) {
59 pr_err("CPU %d: missing or invalid cpu-release-addr property\n",
60 cpu);
61
62 return -1;
63 }
64
65 return 0;
66 }
67
smp_spin_table_cpu_prepare(unsigned int cpu)68 static int smp_spin_table_cpu_prepare(unsigned int cpu)
69 {
70 __le64 __iomem *release_addr;
71
72 if (!cpu_release_addr[cpu])
73 return -ENODEV;
74
75 /*
76 * The cpu-release-addr may or may not be inside the linear mapping.
77 * As ioremap_cache will either give us a new mapping or reuse the
78 * existing linear mapping, we can use it to cover both cases. In
79 * either case the memory will be MT_NORMAL.
80 */
81 release_addr = ioremap_cache(cpu_release_addr[cpu],
82 sizeof(*release_addr));
83 if (!release_addr)
84 return -ENOMEM;
85
86 /*
87 * We write the release address as LE regardless of the native
88 * endianess of the kernel. Therefore, any boot-loaders that
89 * read this address need to convert this address to the
90 * boot-loader's endianess before jumping. This is mandated by
91 * the boot protocol.
92 */
93 writeq_relaxed(__pa(secondary_holding_pen), release_addr);
94 __flush_dcache_area((__force void *)release_addr,
95 sizeof(*release_addr));
96
97 /*
98 * Send an event to wake up the secondary CPU.
99 */
100 sev();
101
102 iounmap(release_addr);
103
104 return 0;
105 }
106
smp_spin_table_cpu_boot(unsigned int cpu)107 static int smp_spin_table_cpu_boot(unsigned int cpu)
108 {
109 /*
110 * Update the pen release flag.
111 */
112 write_pen_release(cpu_logical_map(cpu));
113
114 /*
115 * Send an event, causing the secondaries to read pen_release.
116 */
117 sev();
118
119 return 0;
120 }
121
122 const struct cpu_operations smp_spin_table_ops = {
123 .name = "spin-table",
124 .cpu_init = smp_spin_table_cpu_init,
125 .cpu_prepare = smp_spin_table_cpu_prepare,
126 .cpu_boot = smp_spin_table_cpu_boot,
127 };
128