1/*
2 * Xilinx Video IP Core
3 *
4 * Copyright (C) 2013-2015 Ideas on Board
5 * Copyright (C) 2013-2015 Xilinx, Inc.
6 *
7 * Contacts: Hyun Kwon <hyun.kwon@xilinx.com>
8 *           Laurent Pinchart <laurent.pinchart@ideasonboard.com>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15#ifndef __DT_BINDINGS_MEDIA_XILINX_VIP_H__
16#define __DT_BINDINGS_MEDIA_XILINX_VIP_H__
17
18/*
19 * Video format codes as defined in "AXI4-Stream Video IP and System Design
20 * Guide".
21 */
22#define XVIP_VF_YUV_422			0
23#define XVIP_VF_YUV_444			1
24#define XVIP_VF_RBG			2
25#define XVIP_VF_YUV_420			3
26#define XVIP_VF_YUVA_422		4
27#define XVIP_VF_YUVA_444		5
28#define XVIP_VF_RGBA			6
29#define XVIP_VF_YUVA_420		7
30#define XVIP_VF_YUVD_422		8
31#define XVIP_VF_YUVD_444		9
32#define XVIP_VF_RGBD			10
33#define XVIP_VF_YUVD_420		11
34#define XVIP_VF_MONO_SENSOR		12
35#define XVIP_VF_CUSTOM2			13
36#define XVIP_VF_CUSTOM3			14
37#define XVIP_VF_CUSTOM4			15
38
39#endif /* __DT_BINDINGS_MEDIA_XILINX_VIP_H__ */
40