1/*
2 * linux/arch/arm/mach-sa1100/generic.c
3 *
4 * Author: Nicolas Pitre
5 *
6 * Code common to all SA11x0 machines.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12#include <linux/gpio.h>
13#include <linux/module.h>
14#include <linux/kernel.h>
15#include <linux/init.h>
16#include <linux/delay.h>
17#include <linux/dma-mapping.h>
18#include <linux/pm.h>
19#include <linux/cpufreq.h>
20#include <linux/ioport.h>
21#include <linux/platform_device.h>
22#include <linux/reboot.h>
23
24#include <video/sa1100fb.h>
25
26#include <asm/div64.h>
27#include <asm/mach/map.h>
28#include <asm/mach/flash.h>
29#include <asm/irq.h>
30#include <asm/system_misc.h>
31
32#include <mach/hardware.h>
33#include <mach/irqs.h>
34
35#include "generic.h"
36#include <clocksource/pxa.h>
37
38unsigned int reset_status;
39EXPORT_SYMBOL(reset_status);
40
41#define NR_FREQS	16
42
43/*
44 * This table is setup for a 3.6864MHz Crystal.
45 */
46struct cpufreq_frequency_table sa11x0_freq_table[NR_FREQS+1] = {
47	{ .frequency = 59000,	/*  59.0 MHz */},
48	{ .frequency = 73700,	/*  73.7 MHz */},
49	{ .frequency = 88500,	/*  88.5 MHz */},
50	{ .frequency = 103200,	/* 103.2 MHz */},
51	{ .frequency = 118000,	/* 118.0 MHz */},
52	{ .frequency = 132700,	/* 132.7 MHz */},
53	{ .frequency = 147500,	/* 147.5 MHz */},
54	{ .frequency = 162200,	/* 162.2 MHz */},
55	{ .frequency = 176900,	/* 176.9 MHz */},
56	{ .frequency = 191700,	/* 191.7 MHz */},
57	{ .frequency = 206400,	/* 206.4 MHz */},
58	{ .frequency = 221200,	/* 221.2 MHz */},
59	{ .frequency = 235900,	/* 235.9 MHz */},
60	{ .frequency = 250700,	/* 250.7 MHz */},
61	{ .frequency = 265400,	/* 265.4 MHz */},
62	{ .frequency = 280200,	/* 280.2 MHz */},
63	{ .frequency = CPUFREQ_TABLE_END, },
64};
65
66unsigned int sa11x0_getspeed(unsigned int cpu)
67{
68	if (cpu)
69		return 0;
70	return sa11x0_freq_table[PPCR & 0xf].frequency;
71}
72
73/*
74 * Default power-off for SA1100
75 */
76static void sa1100_power_off(void)
77{
78	mdelay(100);
79	local_irq_disable();
80	/* disable internal oscillator, float CS lines */
81	PCFR = (PCFR_OPDE | PCFR_FP | PCFR_FS);
82	/* enable wake-up on GPIO0 (Assabet...) */
83	PWER = GFER = GRER = 1;
84	/*
85	 * set scratchpad to zero, just in case it is used as a
86	 * restart address by the bootloader.
87	 */
88	PSPR = 0;
89	/* enter sleep mode */
90	PMCR = PMCR_SF;
91}
92
93void sa11x0_restart(enum reboot_mode mode, const char *cmd)
94{
95	if (mode == REBOOT_SOFT) {
96		/* Jump into ROM at address 0 */
97		soft_restart(0);
98	} else {
99		/* Use on-chip reset capability */
100		RSRR = RSRR_SWR;
101	}
102}
103
104static void sa11x0_register_device(struct platform_device *dev, void *data)
105{
106	int err;
107	dev->dev.platform_data = data;
108	err = platform_device_register(dev);
109	if (err)
110		printk(KERN_ERR "Unable to register device %s: %d\n",
111			dev->name, err);
112}
113
114
115static struct resource sa11x0udc_resources[] = {
116	[0] = DEFINE_RES_MEM(__PREG(Ser0UDCCR), SZ_64K),
117	[1] = DEFINE_RES_IRQ(IRQ_Ser0UDC),
118};
119
120static u64 sa11x0udc_dma_mask = 0xffffffffUL;
121
122static struct platform_device sa11x0udc_device = {
123	.name		= "sa11x0-udc",
124	.id		= -1,
125	.dev		= {
126		.dma_mask = &sa11x0udc_dma_mask,
127		.coherent_dma_mask = 0xffffffff,
128	},
129	.num_resources	= ARRAY_SIZE(sa11x0udc_resources),
130	.resource	= sa11x0udc_resources,
131};
132
133static struct resource sa11x0uart1_resources[] = {
134	[0] = DEFINE_RES_MEM(__PREG(Ser1UTCR0), SZ_64K),
135	[1] = DEFINE_RES_IRQ(IRQ_Ser1UART),
136};
137
138static struct platform_device sa11x0uart1_device = {
139	.name		= "sa11x0-uart",
140	.id		= 1,
141	.num_resources	= ARRAY_SIZE(sa11x0uart1_resources),
142	.resource	= sa11x0uart1_resources,
143};
144
145static struct resource sa11x0uart3_resources[] = {
146	[0] = DEFINE_RES_MEM(__PREG(Ser3UTCR0), SZ_64K),
147	[1] = DEFINE_RES_IRQ(IRQ_Ser3UART),
148};
149
150static struct platform_device sa11x0uart3_device = {
151	.name		= "sa11x0-uart",
152	.id		= 3,
153	.num_resources	= ARRAY_SIZE(sa11x0uart3_resources),
154	.resource	= sa11x0uart3_resources,
155};
156
157static struct resource sa11x0mcp_resources[] = {
158	[0] = DEFINE_RES_MEM(__PREG(Ser4MCCR0), SZ_64K),
159	[1] = DEFINE_RES_MEM(__PREG(Ser4MCCR1), 4),
160	[2] = DEFINE_RES_IRQ(IRQ_Ser4MCP),
161};
162
163static u64 sa11x0mcp_dma_mask = 0xffffffffUL;
164
165static struct platform_device sa11x0mcp_device = {
166	.name		= "sa11x0-mcp",
167	.id		= -1,
168	.dev = {
169		.dma_mask = &sa11x0mcp_dma_mask,
170		.coherent_dma_mask = 0xffffffff,
171	},
172	.num_resources	= ARRAY_SIZE(sa11x0mcp_resources),
173	.resource	= sa11x0mcp_resources,
174};
175
176void __init sa11x0_ppc_configure_mcp(void)
177{
178	/* Setup the PPC unit for the MCP */
179	PPDR &= ~PPC_RXD4;
180	PPDR |= PPC_TXD4 | PPC_SCLK | PPC_SFRM;
181	PSDR |= PPC_RXD4;
182	PSDR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM);
183	PPSR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM);
184}
185
186void sa11x0_register_mcp(struct mcp_plat_data *data)
187{
188	sa11x0_register_device(&sa11x0mcp_device, data);
189}
190
191static struct resource sa11x0ssp_resources[] = {
192	[0] = DEFINE_RES_MEM(0x80070000, SZ_64K),
193	[1] = DEFINE_RES_IRQ(IRQ_Ser4SSP),
194};
195
196static u64 sa11x0ssp_dma_mask = 0xffffffffUL;
197
198static struct platform_device sa11x0ssp_device = {
199	.name		= "sa11x0-ssp",
200	.id		= -1,
201	.dev = {
202		.dma_mask = &sa11x0ssp_dma_mask,
203		.coherent_dma_mask = 0xffffffff,
204	},
205	.num_resources	= ARRAY_SIZE(sa11x0ssp_resources),
206	.resource	= sa11x0ssp_resources,
207};
208
209static struct resource sa11x0fb_resources[] = {
210	[0] = DEFINE_RES_MEM(0xb0100000, SZ_64K),
211	[1] = DEFINE_RES_IRQ(IRQ_LCD),
212};
213
214static struct platform_device sa11x0fb_device = {
215	.name		= "sa11x0-fb",
216	.id		= -1,
217	.dev = {
218		.coherent_dma_mask = 0xffffffff,
219	},
220	.num_resources	= ARRAY_SIZE(sa11x0fb_resources),
221	.resource	= sa11x0fb_resources,
222};
223
224void sa11x0_register_lcd(struct sa1100fb_mach_info *inf)
225{
226	sa11x0_register_device(&sa11x0fb_device, inf);
227}
228
229static struct platform_device sa11x0pcmcia_device = {
230	.name		= "sa11x0-pcmcia",
231	.id		= -1,
232};
233
234static struct platform_device sa11x0mtd_device = {
235	.name		= "sa1100-mtd",
236	.id		= -1,
237};
238
239void sa11x0_register_mtd(struct flash_platform_data *flash,
240			 struct resource *res, int nr)
241{
242	flash->name = "sa1100";
243	sa11x0mtd_device.resource = res;
244	sa11x0mtd_device.num_resources = nr;
245	sa11x0_register_device(&sa11x0mtd_device, flash);
246}
247
248static struct resource sa11x0ir_resources[] = {
249	DEFINE_RES_MEM(__PREG(Ser2UTCR0), 0x24),
250	DEFINE_RES_MEM(__PREG(Ser2HSCR0), 0x1c),
251	DEFINE_RES_MEM(__PREG(Ser2HSCR2), 0x04),
252	DEFINE_RES_IRQ(IRQ_Ser2ICP),
253};
254
255static struct platform_device sa11x0ir_device = {
256	.name		= "sa11x0-ir",
257	.id		= -1,
258	.num_resources	= ARRAY_SIZE(sa11x0ir_resources),
259	.resource	= sa11x0ir_resources,
260};
261
262void sa11x0_register_irda(struct irda_platform_data *irda)
263{
264	sa11x0_register_device(&sa11x0ir_device, irda);
265}
266
267static struct resource sa1100_rtc_resources[] = {
268	DEFINE_RES_MEM(0x90010000, 0x40),
269	DEFINE_RES_IRQ_NAMED(IRQ_RTC1Hz, "rtc 1Hz"),
270	DEFINE_RES_IRQ_NAMED(IRQ_RTCAlrm, "rtc alarm"),
271};
272
273static struct platform_device sa11x0rtc_device = {
274	.name		= "sa1100-rtc",
275	.id		= -1,
276	.num_resources	= ARRAY_SIZE(sa1100_rtc_resources),
277	.resource	= sa1100_rtc_resources,
278};
279
280static struct resource sa11x0dma_resources[] = {
281	DEFINE_RES_MEM(DMA_PHYS, DMA_SIZE),
282	DEFINE_RES_IRQ(IRQ_DMA0),
283	DEFINE_RES_IRQ(IRQ_DMA1),
284	DEFINE_RES_IRQ(IRQ_DMA2),
285	DEFINE_RES_IRQ(IRQ_DMA3),
286	DEFINE_RES_IRQ(IRQ_DMA4),
287	DEFINE_RES_IRQ(IRQ_DMA5),
288};
289
290static u64 sa11x0dma_dma_mask = DMA_BIT_MASK(32);
291
292static struct platform_device sa11x0dma_device = {
293	.name		= "sa11x0-dma",
294	.id		= -1,
295	.dev = {
296		.dma_mask = &sa11x0dma_dma_mask,
297		.coherent_dma_mask = 0xffffffff,
298	},
299	.num_resources	= ARRAY_SIZE(sa11x0dma_resources),
300	.resource	= sa11x0dma_resources,
301};
302
303static struct platform_device *sa11x0_devices[] __initdata = {
304	&sa11x0udc_device,
305	&sa11x0uart1_device,
306	&sa11x0uart3_device,
307	&sa11x0ssp_device,
308	&sa11x0pcmcia_device,
309	&sa11x0rtc_device,
310	&sa11x0dma_device,
311};
312
313static int __init sa1100_init(void)
314{
315	pm_power_off = sa1100_power_off;
316	return platform_add_devices(sa11x0_devices, ARRAY_SIZE(sa11x0_devices));
317}
318
319arch_initcall(sa1100_init);
320
321void __init sa11x0_init_late(void)
322{
323	sa11x0_pm_init();
324}
325
326/*
327 * Common I/O mapping:
328 *
329 * Typically, static virtual address mappings are as follow:
330 *
331 * 0xf0000000-0xf3ffffff:	miscellaneous stuff (CPLDs, etc.)
332 * 0xf4000000-0xf4ffffff:	SA-1111
333 * 0xf5000000-0xf5ffffff:	reserved (used by cache flushing area)
334 * 0xf6000000-0xfffeffff:	reserved (internal SA1100 IO defined above)
335 * 0xffff0000-0xffff0fff:	SA1100 exception vectors
336 * 0xffff2000-0xffff2fff:	Minicache copy_user_page area
337 *
338 * Below 0xe8000000 is reserved for vm allocation.
339 *
340 * The machine specific code must provide the extra mapping beside the
341 * default mapping provided here.
342 */
343
344static struct map_desc standard_io_desc[] __initdata = {
345	{	/* PCM */
346		.virtual	=  0xf8000000,
347		.pfn		= __phys_to_pfn(0x80000000),
348		.length		= 0x00100000,
349		.type		= MT_DEVICE
350	}, {	/* SCM */
351		.virtual	=  0xfa000000,
352		.pfn		= __phys_to_pfn(0x90000000),
353		.length		= 0x00100000,
354		.type		= MT_DEVICE
355	}, {	/* MER */
356		.virtual	=  0xfc000000,
357		.pfn		= __phys_to_pfn(0xa0000000),
358		.length		= 0x00100000,
359		.type		= MT_DEVICE
360	}, {	/* LCD + DMA */
361		.virtual	=  0xfe000000,
362		.pfn		= __phys_to_pfn(0xb0000000),
363		.length		= 0x00200000,
364		.type		= MT_DEVICE
365	},
366};
367
368void __init sa1100_map_io(void)
369{
370	iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc));
371}
372
373void __init sa1100_timer_init(void)
374{
375	pxa_timer_nodt_init(IRQ_OST0, io_p2v(0x90000000), 3686400);
376}
377
378/*
379 * Disable the memory bus request/grant signals on the SA1110 to
380 * ensure that we don't receive spurious memory requests.  We set
381 * the MBGNT signal false to ensure the SA1111 doesn't own the
382 * SDRAM bus.
383 */
384void sa1110_mb_disable(void)
385{
386	unsigned long flags;
387
388	local_irq_save(flags);
389
390	PGSR &= ~GPIO_MBGNT;
391	GPCR = GPIO_MBGNT;
392	GPDR = (GPDR & ~GPIO_MBREQ) | GPIO_MBGNT;
393
394	GAFR &= ~(GPIO_MBGNT | GPIO_MBREQ);
395
396	local_irq_restore(flags);
397}
398
399/*
400 * If the system is going to use the SA-1111 DMA engines, set up
401 * the memory bus request/grant pins.
402 */
403void sa1110_mb_enable(void)
404{
405	unsigned long flags;
406
407	local_irq_save(flags);
408
409	PGSR &= ~GPIO_MBGNT;
410	GPCR = GPIO_MBGNT;
411	GPDR = (GPDR & ~GPIO_MBREQ) | GPIO_MBGNT;
412
413	GAFR |= (GPIO_MBGNT | GPIO_MBREQ);
414	TUCR |= TUCR_MR;
415
416	local_irq_restore(flags);
417}
418
419