1/* 2 * OMAP44xx PRM instance offset macros 3 * 4 * Copyright (C) 2009-2011 Texas Instruments, Inc. 5 * Copyright (C) 2009-2010 Nokia Corporation 6 * 7 * Paul Walmsley (paul@pwsan.com) 8 * Rajendra Nayak (rnayak@ti.com) 9 * Benoit Cousson (b-cousson@ti.com) 10 * 11 * This file is automatically generated from the OMAP hardware databases. 12 * We respectfully ask that any modifications to this file be coordinated 13 * with the public linux-omap@vger.kernel.org mailing list and the 14 * authors above to ensure that the autogeneration scripts are kept 15 * up-to-date with the file contents. 16 * 17 * This program is free software; you can redistribute it and/or modify 18 * it under the terms of the GNU General Public License version 2 as 19 * published by the Free Software Foundation. 20 * 21 * XXX This file needs to be updated to align on one of "OMAP4", "OMAP44XX", 22 * or "OMAP4430". 23 */ 24 25#ifndef __ARCH_ARM_MACH_OMAP2_PRM44XX_H 26#define __ARCH_ARM_MACH_OMAP2_PRM44XX_H 27 28#include "prm44xx_54xx.h" 29#include "prm.h" 30 31#define OMAP4430_PRM_BASE 0x4a306000 32 33#define OMAP44XX_PRM_REGADDR(inst, reg) \ 34 OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE + (inst) + (reg)) 35 36 37/* PRM instances */ 38#define OMAP4430_PRM_OCP_SOCKET_INST 0x0000 39#define OMAP4430_PRM_CKGEN_INST 0x0100 40#define OMAP4430_PRM_MPU_INST 0x0300 41#define OMAP4430_PRM_TESLA_INST 0x0400 42#define OMAP4430_PRM_ABE_INST 0x0500 43#define OMAP4430_PRM_ALWAYS_ON_INST 0x0600 44#define OMAP4430_PRM_CORE_INST 0x0700 45#define OMAP4430_PRM_IVAHD_INST 0x0f00 46#define OMAP4430_PRM_CAM_INST 0x1000 47#define OMAP4430_PRM_DSS_INST 0x1100 48#define OMAP4430_PRM_GFX_INST 0x1200 49#define OMAP4430_PRM_L3INIT_INST 0x1300 50#define OMAP4430_PRM_L4PER_INST 0x1400 51#define OMAP4430_PRM_CEFUSE_INST 0x1600 52#define OMAP4430_PRM_WKUP_INST 0x1700 53#define OMAP4430_PRM_WKUP_CM_INST 0x1800 54#define OMAP4430_PRM_EMU_INST 0x1900 55#define OMAP4430_PRM_EMU_CM_INST 0x1a00 56#define OMAP4430_PRM_DEVICE_INST 0x1b00 57#define OMAP4430_PRM_INSTR_INST 0x1f00 58 59/* PRM clockdomain register offsets (from instance start) */ 60#define OMAP4430_PRM_WKUP_CM_WKUP_CDOFFS 0x0000 61#define OMAP4430_PRM_EMU_CM_EMU_CDOFFS 0x0000 62 63/* OMAP4 specific register offsets */ 64#define OMAP4_RM_RSTCTRL 0x0000 65#define OMAP4_RM_RSTST 0x0004 66#define OMAP4_RM_RSTTIME 0x0008 67#define OMAP4_PM_PWSTCTRL 0x0000 68#define OMAP4_PM_PWSTST 0x0004 69 70 71/* PRM */ 72 73/* PRM.OCP_SOCKET_PRM register offsets */ 74#define OMAP4_REVISION_PRM_OFFSET 0x0000 75#define OMAP4430_REVISION_PRM OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_INST, 0x0000) 76#define OMAP4_PRM_IRQSTATUS_MPU_OFFSET 0x0010 77#define OMAP4430_PRM_IRQSTATUS_MPU OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_INST, 0x0010) 78#define OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET 0x0014 79#define OMAP4430_PRM_IRQSTATUS_MPU_2 OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_INST, 0x0014) 80#define OMAP4_PRM_IRQENABLE_MPU_OFFSET 0x0018 81#define OMAP4430_PRM_IRQENABLE_MPU OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_INST, 0x0018) 82#define OMAP4_PRM_IRQENABLE_MPU_2_OFFSET 0x001c 83#define OMAP4430_PRM_IRQENABLE_MPU_2 OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_INST, 0x001c) 84#define OMAP4_PRM_IRQSTATUS_DUCATI_OFFSET 0x0020 85#define OMAP4430_PRM_IRQSTATUS_DUCATI OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_INST, 0x0020) 86#define OMAP4_PRM_IRQENABLE_DUCATI_OFFSET 0x0028 87#define OMAP4430_PRM_IRQENABLE_DUCATI OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_INST, 0x0028) 88#define OMAP4_PRM_IRQSTATUS_TESLA_OFFSET 0x0030 89#define OMAP4430_PRM_IRQSTATUS_TESLA OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_INST, 0x0030) 90#define OMAP4_PRM_IRQENABLE_TESLA_OFFSET 0x0038 91#define OMAP4430_PRM_IRQENABLE_TESLA OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_INST, 0x0038) 92#define OMAP4_CM_PRM_PROFILING_CLKCTRL_OFFSET 0x0040 93#define OMAP4430_CM_PRM_PROFILING_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_INST, 0x0040) 94 95/* PRM.CKGEN_PRM register offsets */ 96#define OMAP4_CM_ABE_DSS_SYS_CLKSEL_OFFSET 0x0000 97#define OMAP4430_CM_ABE_DSS_SYS_CLKSEL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CKGEN_INST, 0x0000) 98#define OMAP4_CM_L4_WKUP_CLKSEL_OFFSET 0x0008 99#define OMAP4430_CM_L4_WKUP_CLKSEL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CKGEN_INST, 0x0008) 100#define OMAP4_CM_ABE_PLL_REF_CLKSEL_OFFSET 0x000c 101#define OMAP4430_CM_ABE_PLL_REF_CLKSEL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CKGEN_INST, 0x000c) 102#define OMAP4_CM_SYS_CLKSEL_OFFSET 0x0010 103#define OMAP4430_CM_SYS_CLKSEL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CKGEN_INST, 0x0010) 104 105/* PRM.MPU_PRM register offsets */ 106#define OMAP4_PM_MPU_PWRSTCTRL_OFFSET 0x0000 107#define OMAP4430_PM_MPU_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_MPU_INST, 0x0000) 108#define OMAP4_PM_MPU_PWRSTST_OFFSET 0x0004 109#define OMAP4430_PM_MPU_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_MPU_INST, 0x0004) 110#define OMAP4_RM_MPU_RSTST_OFFSET 0x0014 111#define OMAP4430_RM_MPU_RSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_MPU_INST, 0x0014) 112#define OMAP4_RM_MPU_MPU_CONTEXT_OFFSET 0x0024 113#define OMAP4430_RM_MPU_MPU_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_MPU_INST, 0x0024) 114 115/* PRM.TESLA_PRM register offsets */ 116#define OMAP4_PM_TESLA_PWRSTCTRL_OFFSET 0x0000 117#define OMAP4430_PM_TESLA_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_TESLA_INST, 0x0000) 118#define OMAP4_PM_TESLA_PWRSTST_OFFSET 0x0004 119#define OMAP4430_PM_TESLA_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_TESLA_INST, 0x0004) 120#define OMAP4_RM_TESLA_RSTCTRL_OFFSET 0x0010 121#define OMAP4430_RM_TESLA_RSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_TESLA_INST, 0x0010) 122#define OMAP4_RM_TESLA_RSTST_OFFSET 0x0014 123#define OMAP4430_RM_TESLA_RSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_TESLA_INST, 0x0014) 124#define OMAP4_RM_TESLA_TESLA_CONTEXT_OFFSET 0x0024 125#define OMAP4430_RM_TESLA_TESLA_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_TESLA_INST, 0x0024) 126 127/* PRM.ABE_PRM register offsets */ 128#define OMAP4_PM_ABE_PWRSTCTRL_OFFSET 0x0000 129#define OMAP4430_PM_ABE_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0000) 130#define OMAP4_PM_ABE_PWRSTST_OFFSET 0x0004 131#define OMAP4430_PM_ABE_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0004) 132#define OMAP4_RM_ABE_AESS_CONTEXT_OFFSET 0x002c 133#define OMAP4430_RM_ABE_AESS_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x002c) 134#define OMAP4_PM_ABE_PDM_WKDEP_OFFSET 0x0030 135#define OMAP4430_PM_ABE_PDM_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0030) 136#define OMAP4_RM_ABE_PDM_CONTEXT_OFFSET 0x0034 137#define OMAP4430_RM_ABE_PDM_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0034) 138#define OMAP4_PM_ABE_DMIC_WKDEP_OFFSET 0x0038 139#define OMAP4430_PM_ABE_DMIC_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0038) 140#define OMAP4_RM_ABE_DMIC_CONTEXT_OFFSET 0x003c 141#define OMAP4430_RM_ABE_DMIC_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x003c) 142#define OMAP4_PM_ABE_MCASP_WKDEP_OFFSET 0x0040 143#define OMAP4430_PM_ABE_MCASP_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0040) 144#define OMAP4_RM_ABE_MCASP_CONTEXT_OFFSET 0x0044 145#define OMAP4430_RM_ABE_MCASP_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0044) 146#define OMAP4_PM_ABE_MCBSP1_WKDEP_OFFSET 0x0048 147#define OMAP4430_PM_ABE_MCBSP1_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0048) 148#define OMAP4_RM_ABE_MCBSP1_CONTEXT_OFFSET 0x004c 149#define OMAP4430_RM_ABE_MCBSP1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x004c) 150#define OMAP4_PM_ABE_MCBSP2_WKDEP_OFFSET 0x0050 151#define OMAP4430_PM_ABE_MCBSP2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0050) 152#define OMAP4_RM_ABE_MCBSP2_CONTEXT_OFFSET 0x0054 153#define OMAP4430_RM_ABE_MCBSP2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0054) 154#define OMAP4_PM_ABE_MCBSP3_WKDEP_OFFSET 0x0058 155#define OMAP4430_PM_ABE_MCBSP3_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0058) 156#define OMAP4_RM_ABE_MCBSP3_CONTEXT_OFFSET 0x005c 157#define OMAP4430_RM_ABE_MCBSP3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x005c) 158#define OMAP4_PM_ABE_SLIMBUS_WKDEP_OFFSET 0x0060 159#define OMAP4430_PM_ABE_SLIMBUS_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0060) 160#define OMAP4_RM_ABE_SLIMBUS_CONTEXT_OFFSET 0x0064 161#define OMAP4430_RM_ABE_SLIMBUS_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0064) 162#define OMAP4_PM_ABE_TIMER5_WKDEP_OFFSET 0x0068 163#define OMAP4430_PM_ABE_TIMER5_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0068) 164#define OMAP4_RM_ABE_TIMER5_CONTEXT_OFFSET 0x006c 165#define OMAP4430_RM_ABE_TIMER5_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x006c) 166#define OMAP4_PM_ABE_TIMER6_WKDEP_OFFSET 0x0070 167#define OMAP4430_PM_ABE_TIMER6_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0070) 168#define OMAP4_RM_ABE_TIMER6_CONTEXT_OFFSET 0x0074 169#define OMAP4430_RM_ABE_TIMER6_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0074) 170#define OMAP4_PM_ABE_TIMER7_WKDEP_OFFSET 0x0078 171#define OMAP4430_PM_ABE_TIMER7_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0078) 172#define OMAP4_RM_ABE_TIMER7_CONTEXT_OFFSET 0x007c 173#define OMAP4430_RM_ABE_TIMER7_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x007c) 174#define OMAP4_PM_ABE_TIMER8_WKDEP_OFFSET 0x0080 175#define OMAP4430_PM_ABE_TIMER8_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0080) 176#define OMAP4_RM_ABE_TIMER8_CONTEXT_OFFSET 0x0084 177#define OMAP4430_RM_ABE_TIMER8_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0084) 178#define OMAP4_PM_ABE_WDT3_WKDEP_OFFSET 0x0088 179#define OMAP4430_PM_ABE_WDT3_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0088) 180#define OMAP4_RM_ABE_WDT3_CONTEXT_OFFSET 0x008c 181#define OMAP4430_RM_ABE_WDT3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x008c) 182 183/* PRM.ALWAYS_ON_PRM register offsets */ 184#define OMAP4_RM_ALWON_MDMINTC_CONTEXT_OFFSET 0x0024 185#define OMAP4430_RM_ALWON_MDMINTC_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ALWAYS_ON_INST, 0x0024) 186#define OMAP4_PM_ALWON_SR_MPU_WKDEP_OFFSET 0x0028 187#define OMAP4430_PM_ALWON_SR_MPU_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ALWAYS_ON_INST, 0x0028) 188#define OMAP4_RM_ALWON_SR_MPU_CONTEXT_OFFSET 0x002c 189#define OMAP4430_RM_ALWON_SR_MPU_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ALWAYS_ON_INST, 0x002c) 190#define OMAP4_PM_ALWON_SR_IVA_WKDEP_OFFSET 0x0030 191#define OMAP4430_PM_ALWON_SR_IVA_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ALWAYS_ON_INST, 0x0030) 192#define OMAP4_RM_ALWON_SR_IVA_CONTEXT_OFFSET 0x0034 193#define OMAP4430_RM_ALWON_SR_IVA_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ALWAYS_ON_INST, 0x0034) 194#define OMAP4_PM_ALWON_SR_CORE_WKDEP_OFFSET 0x0038 195#define OMAP4430_PM_ALWON_SR_CORE_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ALWAYS_ON_INST, 0x0038) 196#define OMAP4_RM_ALWON_SR_CORE_CONTEXT_OFFSET 0x003c 197#define OMAP4430_RM_ALWON_SR_CORE_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ALWAYS_ON_INST, 0x003c) 198 199/* PRM.CORE_PRM register offsets */ 200#define OMAP4_PM_CORE_PWRSTCTRL_OFFSET 0x0000 201#define OMAP4430_PM_CORE_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0000) 202#define OMAP4_PM_CORE_PWRSTST_OFFSET 0x0004 203#define OMAP4430_PM_CORE_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0004) 204#define OMAP4_RM_L3_1_L3_1_CONTEXT_OFFSET 0x0024 205#define OMAP4430_RM_L3_1_L3_1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0024) 206#define OMAP4_RM_L3_2_L3_2_CONTEXT_OFFSET 0x0124 207#define OMAP4430_RM_L3_2_L3_2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0124) 208#define OMAP4_RM_L3_2_GPMC_CONTEXT_OFFSET 0x012c 209#define OMAP4430_RM_L3_2_GPMC_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x012c) 210#define OMAP4_RM_L3_2_OCMC_RAM_CONTEXT_OFFSET 0x0134 211#define OMAP4430_RM_L3_2_OCMC_RAM_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0134) 212#define OMAP4_RM_DUCATI_RSTCTRL_OFFSET 0x0210 213#define OMAP4430_RM_DUCATI_RSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0210) 214#define OMAP4_RM_DUCATI_RSTST_OFFSET 0x0214 215#define OMAP4430_RM_DUCATI_RSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0214) 216#define OMAP4_RM_DUCATI_DUCATI_CONTEXT_OFFSET 0x0224 217#define OMAP4430_RM_DUCATI_DUCATI_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0224) 218#define OMAP4_RM_SDMA_SDMA_CONTEXT_OFFSET 0x0324 219#define OMAP4430_RM_SDMA_SDMA_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0324) 220#define OMAP4_RM_MEMIF_DMM_CONTEXT_OFFSET 0x0424 221#define OMAP4430_RM_MEMIF_DMM_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0424) 222#define OMAP4_RM_MEMIF_EMIF_FW_CONTEXT_OFFSET 0x042c 223#define OMAP4430_RM_MEMIF_EMIF_FW_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x042c) 224#define OMAP4_RM_MEMIF_EMIF_1_CONTEXT_OFFSET 0x0434 225#define OMAP4430_RM_MEMIF_EMIF_1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0434) 226#define OMAP4_RM_MEMIF_EMIF_2_CONTEXT_OFFSET 0x043c 227#define OMAP4430_RM_MEMIF_EMIF_2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x043c) 228#define OMAP4_RM_MEMIF_DLL_CONTEXT_OFFSET 0x0444 229#define OMAP4430_RM_MEMIF_DLL_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0444) 230#define OMAP4_RM_MEMIF_EMIF_H1_CONTEXT_OFFSET 0x0454 231#define OMAP4430_RM_MEMIF_EMIF_H1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0454) 232#define OMAP4_RM_MEMIF_EMIF_H2_CONTEXT_OFFSET 0x045c 233#define OMAP4430_RM_MEMIF_EMIF_H2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x045c) 234#define OMAP4_RM_MEMIF_DLL_H_CONTEXT_OFFSET 0x0464 235#define OMAP4430_RM_MEMIF_DLL_H_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0464) 236#define OMAP4_RM_D2D_SAD2D_CONTEXT_OFFSET 0x0524 237#define OMAP4430_RM_D2D_SAD2D_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0524) 238#define OMAP4_RM_D2D_MODEM_ICR_CONTEXT_OFFSET 0x052c 239#define OMAP4430_RM_D2D_MODEM_ICR_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x052c) 240#define OMAP4_RM_D2D_SAD2D_FW_CONTEXT_OFFSET 0x0534 241#define OMAP4430_RM_D2D_SAD2D_FW_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0534) 242#define OMAP4_RM_L4CFG_L4_CFG_CONTEXT_OFFSET 0x0624 243#define OMAP4430_RM_L4CFG_L4_CFG_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0624) 244#define OMAP4_RM_L4CFG_HW_SEM_CONTEXT_OFFSET 0x062c 245#define OMAP4430_RM_L4CFG_HW_SEM_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x062c) 246#define OMAP4_RM_L4CFG_MAILBOX_CONTEXT_OFFSET 0x0634 247#define OMAP4430_RM_L4CFG_MAILBOX_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0634) 248#define OMAP4_RM_L4CFG_SAR_ROM_CONTEXT_OFFSET 0x063c 249#define OMAP4430_RM_L4CFG_SAR_ROM_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x063c) 250#define OMAP4_RM_L3INSTR_L3_3_CONTEXT_OFFSET 0x0724 251#define OMAP4430_RM_L3INSTR_L3_3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0724) 252#define OMAP4_RM_L3INSTR_L3_INSTR_CONTEXT_OFFSET 0x072c 253#define OMAP4430_RM_L3INSTR_L3_INSTR_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x072c) 254#define OMAP4_RM_L3INSTR_OCP_WP1_CONTEXT_OFFSET 0x0744 255#define OMAP4430_RM_L3INSTR_OCP_WP1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0744) 256 257/* PRM.IVAHD_PRM register offsets */ 258#define OMAP4_PM_IVAHD_PWRSTCTRL_OFFSET 0x0000 259#define OMAP4430_PM_IVAHD_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_IVAHD_INST, 0x0000) 260#define OMAP4_PM_IVAHD_PWRSTST_OFFSET 0x0004 261#define OMAP4430_PM_IVAHD_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_IVAHD_INST, 0x0004) 262#define OMAP4_RM_IVAHD_RSTCTRL_OFFSET 0x0010 263#define OMAP4430_RM_IVAHD_RSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_IVAHD_INST, 0x0010) 264#define OMAP4_RM_IVAHD_RSTST_OFFSET 0x0014 265#define OMAP4430_RM_IVAHD_RSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_IVAHD_INST, 0x0014) 266#define OMAP4_RM_IVAHD_IVAHD_CONTEXT_OFFSET 0x0024 267#define OMAP4430_RM_IVAHD_IVAHD_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_IVAHD_INST, 0x0024) 268#define OMAP4_RM_IVAHD_SL2_CONTEXT_OFFSET 0x002c 269#define OMAP4430_RM_IVAHD_SL2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_IVAHD_INST, 0x002c) 270 271/* PRM.CAM_PRM register offsets */ 272#define OMAP4_PM_CAM_PWRSTCTRL_OFFSET 0x0000 273#define OMAP4430_PM_CAM_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CAM_INST, 0x0000) 274#define OMAP4_PM_CAM_PWRSTST_OFFSET 0x0004 275#define OMAP4430_PM_CAM_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CAM_INST, 0x0004) 276#define OMAP4_RM_CAM_ISS_CONTEXT_OFFSET 0x0024 277#define OMAP4430_RM_CAM_ISS_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CAM_INST, 0x0024) 278#define OMAP4_RM_CAM_FDIF_CONTEXT_OFFSET 0x002c 279#define OMAP4430_RM_CAM_FDIF_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CAM_INST, 0x002c) 280 281/* PRM.DSS_PRM register offsets */ 282#define OMAP4_PM_DSS_PWRSTCTRL_OFFSET 0x0000 283#define OMAP4430_PM_DSS_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DSS_INST, 0x0000) 284#define OMAP4_PM_DSS_PWRSTST_OFFSET 0x0004 285#define OMAP4430_PM_DSS_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DSS_INST, 0x0004) 286#define OMAP4_PM_DSS_DSS_WKDEP_OFFSET 0x0020 287#define OMAP4430_PM_DSS_DSS_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DSS_INST, 0x0020) 288#define OMAP4_RM_DSS_DSS_CONTEXT_OFFSET 0x0024 289#define OMAP4430_RM_DSS_DSS_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DSS_INST, 0x0024) 290#define OMAP4_RM_DSS_DEISS_CONTEXT_OFFSET 0x002c 291#define OMAP4430_RM_DSS_DEISS_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DSS_INST, 0x002c) 292 293/* PRM.GFX_PRM register offsets */ 294#define OMAP4_PM_GFX_PWRSTCTRL_OFFSET 0x0000 295#define OMAP4430_PM_GFX_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_GFX_INST, 0x0000) 296#define OMAP4_PM_GFX_PWRSTST_OFFSET 0x0004 297#define OMAP4430_PM_GFX_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_GFX_INST, 0x0004) 298#define OMAP4_RM_GFX_GFX_CONTEXT_OFFSET 0x0024 299#define OMAP4430_RM_GFX_GFX_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_GFX_INST, 0x0024) 300 301/* PRM.L3INIT_PRM register offsets */ 302#define OMAP4_PM_L3INIT_PWRSTCTRL_OFFSET 0x0000 303#define OMAP4430_PM_L3INIT_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0000) 304#define OMAP4_PM_L3INIT_PWRSTST_OFFSET 0x0004 305#define OMAP4430_PM_L3INIT_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0004) 306#define OMAP4_PM_L3INIT_MMC1_WKDEP_OFFSET 0x0028 307#define OMAP4430_PM_L3INIT_MMC1_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0028) 308#define OMAP4_RM_L3INIT_MMC1_CONTEXT_OFFSET 0x002c 309#define OMAP4430_RM_L3INIT_MMC1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x002c) 310#define OMAP4_PM_L3INIT_MMC2_WKDEP_OFFSET 0x0030 311#define OMAP4430_PM_L3INIT_MMC2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0030) 312#define OMAP4_RM_L3INIT_MMC2_CONTEXT_OFFSET 0x0034 313#define OMAP4430_RM_L3INIT_MMC2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0034) 314#define OMAP4_PM_L3INIT_HSI_WKDEP_OFFSET 0x0038 315#define OMAP4430_PM_L3INIT_HSI_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0038) 316#define OMAP4_RM_L3INIT_HSI_CONTEXT_OFFSET 0x003c 317#define OMAP4430_RM_L3INIT_HSI_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x003c) 318#define OMAP4_PM_L3INIT_UNIPRO1_WKDEP_OFFSET 0x0040 319#define OMAP4430_PM_L3INIT_UNIPRO1_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0040) 320#define OMAP4_RM_L3INIT_UNIPRO1_CONTEXT_OFFSET 0x0044 321#define OMAP4430_RM_L3INIT_UNIPRO1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0044) 322#define OMAP4_PM_L3INIT_USB_HOST_WKDEP_OFFSET 0x0058 323#define OMAP4430_PM_L3INIT_USB_HOST_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0058) 324#define OMAP4_RM_L3INIT_USB_HOST_CONTEXT_OFFSET 0x005c 325#define OMAP4430_RM_L3INIT_USB_HOST_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x005c) 326#define OMAP4_PM_L3INIT_USB_OTG_WKDEP_OFFSET 0x0060 327#define OMAP4430_PM_L3INIT_USB_OTG_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0060) 328#define OMAP4_RM_L3INIT_USB_OTG_CONTEXT_OFFSET 0x0064 329#define OMAP4430_RM_L3INIT_USB_OTG_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0064) 330#define OMAP4_PM_L3INIT_USB_TLL_WKDEP_OFFSET 0x0068 331#define OMAP4430_PM_L3INIT_USB_TLL_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0068) 332#define OMAP4_RM_L3INIT_USB_TLL_CONTEXT_OFFSET 0x006c 333#define OMAP4430_RM_L3INIT_USB_TLL_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x006c) 334#define OMAP4_RM_L3INIT_P1500_CONTEXT_OFFSET 0x007c 335#define OMAP4430_RM_L3INIT_P1500_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x007c) 336#define OMAP4_RM_L3INIT_EMAC_CONTEXT_OFFSET 0x0084 337#define OMAP4430_RM_L3INIT_EMAC_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0084) 338#define OMAP4_PM_L3INIT_SATA_WKDEP_OFFSET 0x0088 339#define OMAP4430_PM_L3INIT_SATA_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0088) 340#define OMAP4_RM_L3INIT_SATA_CONTEXT_OFFSET 0x008c 341#define OMAP4430_RM_L3INIT_SATA_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x008c) 342#define OMAP4_RM_L3INIT_TPPSS_CONTEXT_OFFSET 0x0094 343#define OMAP4430_RM_L3INIT_TPPSS_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0094) 344#define OMAP4_PM_L3INIT_PCIESS_WKDEP_OFFSET 0x0098 345#define OMAP4430_PM_L3INIT_PCIESS_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0098) 346#define OMAP4_RM_L3INIT_PCIESS_CONTEXT_OFFSET 0x009c 347#define OMAP4430_RM_L3INIT_PCIESS_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x009c) 348#define OMAP4_RM_L3INIT_CCPTX_CONTEXT_OFFSET 0x00ac 349#define OMAP4430_RM_L3INIT_CCPTX_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x00ac) 350#define OMAP4_PM_L3INIT_XHPI_WKDEP_OFFSET 0x00c0 351#define OMAP4430_PM_L3INIT_XHPI_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x00c0) 352#define OMAP4_RM_L3INIT_XHPI_CONTEXT_OFFSET 0x00c4 353#define OMAP4430_RM_L3INIT_XHPI_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x00c4) 354#define OMAP4_PM_L3INIT_MMC6_WKDEP_OFFSET 0x00c8 355#define OMAP4430_PM_L3INIT_MMC6_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x00c8) 356#define OMAP4_RM_L3INIT_MMC6_CONTEXT_OFFSET 0x00cc 357#define OMAP4430_RM_L3INIT_MMC6_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x00cc) 358#define OMAP4_PM_L3INIT_USB_HOST_FS_WKDEP_OFFSET 0x00d0 359#define OMAP4430_PM_L3INIT_USB_HOST_FS_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x00d0) 360#define OMAP4_RM_L3INIT_USB_HOST_FS_CONTEXT_OFFSET 0x00d4 361#define OMAP4430_RM_L3INIT_USB_HOST_FS_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x00d4) 362#define OMAP4_RM_L3INIT_USBPHYOCP2SCP_CONTEXT_OFFSET 0x00e4 363#define OMAP4430_RM_L3INIT_USBPHYOCP2SCP_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x00e4) 364 365/* PRM.L4PER_PRM register offsets */ 366#define OMAP4_PM_L4PER_PWRSTCTRL_OFFSET 0x0000 367#define OMAP4430_PM_L4PER_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0000) 368#define OMAP4_PM_L4PER_PWRSTST_OFFSET 0x0004 369#define OMAP4430_PM_L4PER_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0004) 370#define OMAP4_RM_L4PER_ADC_CONTEXT_OFFSET 0x0024 371#define OMAP4430_RM_L4PER_ADC_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0024) 372#define OMAP4_PM_L4PER_DMTIMER10_WKDEP_OFFSET 0x0028 373#define OMAP4430_PM_L4PER_DMTIMER10_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0028) 374#define OMAP4_RM_L4PER_DMTIMER10_CONTEXT_OFFSET 0x002c 375#define OMAP4430_RM_L4PER_DMTIMER10_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x002c) 376#define OMAP4_PM_L4PER_DMTIMER11_WKDEP_OFFSET 0x0030 377#define OMAP4430_PM_L4PER_DMTIMER11_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0030) 378#define OMAP4_RM_L4PER_DMTIMER11_CONTEXT_OFFSET 0x0034 379#define OMAP4430_RM_L4PER_DMTIMER11_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0034) 380#define OMAP4_PM_L4PER_DMTIMER2_WKDEP_OFFSET 0x0038 381#define OMAP4430_PM_L4PER_DMTIMER2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0038) 382#define OMAP4_RM_L4PER_DMTIMER2_CONTEXT_OFFSET 0x003c 383#define OMAP4430_RM_L4PER_DMTIMER2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x003c) 384#define OMAP4_PM_L4PER_DMTIMER3_WKDEP_OFFSET 0x0040 385#define OMAP4430_PM_L4PER_DMTIMER3_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0040) 386#define OMAP4_RM_L4PER_DMTIMER3_CONTEXT_OFFSET 0x0044 387#define OMAP4430_RM_L4PER_DMTIMER3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0044) 388#define OMAP4_PM_L4PER_DMTIMER4_WKDEP_OFFSET 0x0048 389#define OMAP4430_PM_L4PER_DMTIMER4_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0048) 390#define OMAP4_RM_L4PER_DMTIMER4_CONTEXT_OFFSET 0x004c 391#define OMAP4430_RM_L4PER_DMTIMER4_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x004c) 392#define OMAP4_PM_L4PER_DMTIMER9_WKDEP_OFFSET 0x0050 393#define OMAP4430_PM_L4PER_DMTIMER9_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0050) 394#define OMAP4_RM_L4PER_DMTIMER9_CONTEXT_OFFSET 0x0054 395#define OMAP4430_RM_L4PER_DMTIMER9_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0054) 396#define OMAP4_RM_L4PER_ELM_CONTEXT_OFFSET 0x005c 397#define OMAP4430_RM_L4PER_ELM_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x005c) 398#define OMAP4_PM_L4PER_GPIO2_WKDEP_OFFSET 0x0060 399#define OMAP4430_PM_L4PER_GPIO2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0060) 400#define OMAP4_RM_L4PER_GPIO2_CONTEXT_OFFSET 0x0064 401#define OMAP4430_RM_L4PER_GPIO2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0064) 402#define OMAP4_PM_L4PER_GPIO3_WKDEP_OFFSET 0x0068 403#define OMAP4430_PM_L4PER_GPIO3_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0068) 404#define OMAP4_RM_L4PER_GPIO3_CONTEXT_OFFSET 0x006c 405#define OMAP4430_RM_L4PER_GPIO3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x006c) 406#define OMAP4_PM_L4PER_GPIO4_WKDEP_OFFSET 0x0070 407#define OMAP4430_PM_L4PER_GPIO4_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0070) 408#define OMAP4_RM_L4PER_GPIO4_CONTEXT_OFFSET 0x0074 409#define OMAP4430_RM_L4PER_GPIO4_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0074) 410#define OMAP4_PM_L4PER_GPIO5_WKDEP_OFFSET 0x0078 411#define OMAP4430_PM_L4PER_GPIO5_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0078) 412#define OMAP4_RM_L4PER_GPIO5_CONTEXT_OFFSET 0x007c 413#define OMAP4430_RM_L4PER_GPIO5_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x007c) 414#define OMAP4_PM_L4PER_GPIO6_WKDEP_OFFSET 0x0080 415#define OMAP4430_PM_L4PER_GPIO6_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0080) 416#define OMAP4_RM_L4PER_GPIO6_CONTEXT_OFFSET 0x0084 417#define OMAP4430_RM_L4PER_GPIO6_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0084) 418#define OMAP4_RM_L4PER_HDQ1W_CONTEXT_OFFSET 0x008c 419#define OMAP4430_RM_L4PER_HDQ1W_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x008c) 420#define OMAP4_PM_L4PER_HECC1_WKDEP_OFFSET 0x0090 421#define OMAP4430_PM_L4PER_HECC1_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0090) 422#define OMAP4_RM_L4PER_HECC1_CONTEXT_OFFSET 0x0094 423#define OMAP4430_RM_L4PER_HECC1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0094) 424#define OMAP4_PM_L4PER_HECC2_WKDEP_OFFSET 0x0098 425#define OMAP4430_PM_L4PER_HECC2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0098) 426#define OMAP4_RM_L4PER_HECC2_CONTEXT_OFFSET 0x009c 427#define OMAP4430_RM_L4PER_HECC2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x009c) 428#define OMAP4_PM_L4PER_I2C1_WKDEP_OFFSET 0x00a0 429#define OMAP4430_PM_L4PER_I2C1_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00a0) 430#define OMAP4_RM_L4PER_I2C1_CONTEXT_OFFSET 0x00a4 431#define OMAP4430_RM_L4PER_I2C1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00a4) 432#define OMAP4_PM_L4PER_I2C2_WKDEP_OFFSET 0x00a8 433#define OMAP4430_PM_L4PER_I2C2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00a8) 434#define OMAP4_RM_L4PER_I2C2_CONTEXT_OFFSET 0x00ac 435#define OMAP4430_RM_L4PER_I2C2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00ac) 436#define OMAP4_PM_L4PER_I2C3_WKDEP_OFFSET 0x00b0 437#define OMAP4430_PM_L4PER_I2C3_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00b0) 438#define OMAP4_RM_L4PER_I2C3_CONTEXT_OFFSET 0x00b4 439#define OMAP4430_RM_L4PER_I2C3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00b4) 440#define OMAP4_PM_L4PER_I2C4_WKDEP_OFFSET 0x00b8 441#define OMAP4430_PM_L4PER_I2C4_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00b8) 442#define OMAP4_RM_L4PER_I2C4_CONTEXT_OFFSET 0x00bc 443#define OMAP4430_RM_L4PER_I2C4_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00bc) 444#define OMAP4_RM_L4PER_L4_PER_CONTEXT_OFFSET 0x00c0 445#define OMAP4430_RM_L4PER_L4_PER_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00c0) 446#define OMAP4_PM_L4PER_MCASP2_WKDEP_OFFSET 0x00d0 447#define OMAP4430_PM_L4PER_MCASP2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00d0) 448#define OMAP4_RM_L4PER_MCASP2_CONTEXT_OFFSET 0x00d4 449#define OMAP4430_RM_L4PER_MCASP2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00d4) 450#define OMAP4_PM_L4PER_MCASP3_WKDEP_OFFSET 0x00d8 451#define OMAP4430_PM_L4PER_MCASP3_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00d8) 452#define OMAP4_RM_L4PER_MCASP3_CONTEXT_OFFSET 0x00dc 453#define OMAP4430_RM_L4PER_MCASP3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00dc) 454#define OMAP4_PM_L4PER_MCBSP4_WKDEP_OFFSET 0x00e0 455#define OMAP4430_PM_L4PER_MCBSP4_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00e0) 456#define OMAP4_RM_L4PER_MCBSP4_CONTEXT_OFFSET 0x00e4 457#define OMAP4430_RM_L4PER_MCBSP4_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00e4) 458#define OMAP4_RM_L4PER_MGATE_CONTEXT_OFFSET 0x00ec 459#define OMAP4430_RM_L4PER_MGATE_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00ec) 460#define OMAP4_PM_L4PER_MCSPI1_WKDEP_OFFSET 0x00f0 461#define OMAP4430_PM_L4PER_MCSPI1_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00f0) 462#define OMAP4_RM_L4PER_MCSPI1_CONTEXT_OFFSET 0x00f4 463#define OMAP4430_RM_L4PER_MCSPI1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00f4) 464#define OMAP4_PM_L4PER_MCSPI2_WKDEP_OFFSET 0x00f8 465#define OMAP4430_PM_L4PER_MCSPI2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00f8) 466#define OMAP4_RM_L4PER_MCSPI2_CONTEXT_OFFSET 0x00fc 467#define OMAP4430_RM_L4PER_MCSPI2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00fc) 468#define OMAP4_PM_L4PER_MCSPI3_WKDEP_OFFSET 0x0100 469#define OMAP4430_PM_L4PER_MCSPI3_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0100) 470#define OMAP4_RM_L4PER_MCSPI3_CONTEXT_OFFSET 0x0104 471#define OMAP4430_RM_L4PER_MCSPI3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0104) 472#define OMAP4_PM_L4PER_MCSPI4_WKDEP_OFFSET 0x0108 473#define OMAP4430_PM_L4PER_MCSPI4_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0108) 474#define OMAP4_RM_L4PER_MCSPI4_CONTEXT_OFFSET 0x010c 475#define OMAP4430_RM_L4PER_MCSPI4_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x010c) 476#define OMAP4_PM_L4PER_MMCSD3_WKDEP_OFFSET 0x0120 477#define OMAP4430_PM_L4PER_MMCSD3_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0120) 478#define OMAP4_RM_L4PER_MMCSD3_CONTEXT_OFFSET 0x0124 479#define OMAP4430_RM_L4PER_MMCSD3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0124) 480#define OMAP4_PM_L4PER_MMCSD4_WKDEP_OFFSET 0x0128 481#define OMAP4430_PM_L4PER_MMCSD4_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0128) 482#define OMAP4_RM_L4PER_MMCSD4_CONTEXT_OFFSET 0x012c 483#define OMAP4430_RM_L4PER_MMCSD4_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x012c) 484#define OMAP4_RM_L4PER_MSPROHG_CONTEXT_OFFSET 0x0134 485#define OMAP4430_RM_L4PER_MSPROHG_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0134) 486#define OMAP4_PM_L4PER_SLIMBUS2_WKDEP_OFFSET 0x0138 487#define OMAP4430_PM_L4PER_SLIMBUS2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0138) 488#define OMAP4_RM_L4PER_SLIMBUS2_CONTEXT_OFFSET 0x013c 489#define OMAP4430_RM_L4PER_SLIMBUS2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x013c) 490#define OMAP4_PM_L4PER_UART1_WKDEP_OFFSET 0x0140 491#define OMAP4430_PM_L4PER_UART1_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0140) 492#define OMAP4_RM_L4PER_UART1_CONTEXT_OFFSET 0x0144 493#define OMAP4430_RM_L4PER_UART1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0144) 494#define OMAP4_PM_L4PER_UART2_WKDEP_OFFSET 0x0148 495#define OMAP4430_PM_L4PER_UART2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0148) 496#define OMAP4_RM_L4PER_UART2_CONTEXT_OFFSET 0x014c 497#define OMAP4430_RM_L4PER_UART2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x014c) 498#define OMAP4_PM_L4PER_UART3_WKDEP_OFFSET 0x0150 499#define OMAP4430_PM_L4PER_UART3_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0150) 500#define OMAP4_RM_L4PER_UART3_CONTEXT_OFFSET 0x0154 501#define OMAP4430_RM_L4PER_UART3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0154) 502#define OMAP4_PM_L4PER_UART4_WKDEP_OFFSET 0x0158 503#define OMAP4430_PM_L4PER_UART4_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0158) 504#define OMAP4_RM_L4PER_UART4_CONTEXT_OFFSET 0x015c 505#define OMAP4430_RM_L4PER_UART4_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x015c) 506#define OMAP4_PM_L4PER_MMCSD5_WKDEP_OFFSET 0x0160 507#define OMAP4430_PM_L4PER_MMCSD5_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0160) 508#define OMAP4_RM_L4PER_MMCSD5_CONTEXT_OFFSET 0x0164 509#define OMAP4430_RM_L4PER_MMCSD5_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0164) 510#define OMAP4_PM_L4PER_I2C5_WKDEP_OFFSET 0x0168 511#define OMAP4430_PM_L4PER_I2C5_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0168) 512#define OMAP4_RM_L4PER_I2C5_CONTEXT_OFFSET 0x016c 513#define OMAP4430_RM_L4PER_I2C5_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x016c) 514#define OMAP4_RM_L4SEC_AES1_CONTEXT_OFFSET 0x01a4 515#define OMAP4430_RM_L4SEC_AES1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x01a4) 516#define OMAP4_RM_L4SEC_AES2_CONTEXT_OFFSET 0x01ac 517#define OMAP4430_RM_L4SEC_AES2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x01ac) 518#define OMAP4_RM_L4SEC_DES3DES_CONTEXT_OFFSET 0x01b4 519#define OMAP4430_RM_L4SEC_DES3DES_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x01b4) 520#define OMAP4_RM_L4SEC_PKAEIP29_CONTEXT_OFFSET 0x01bc 521#define OMAP4430_RM_L4SEC_PKAEIP29_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x01bc) 522#define OMAP4_RM_L4SEC_RNG_CONTEXT_OFFSET 0x01c4 523#define OMAP4430_RM_L4SEC_RNG_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x01c4) 524#define OMAP4_RM_L4SEC_SHA2MD51_CONTEXT_OFFSET 0x01cc 525#define OMAP4430_RM_L4SEC_SHA2MD51_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x01cc) 526#define OMAP4_RM_L4SEC_CRYPTODMA_CONTEXT_OFFSET 0x01dc 527#define OMAP4430_RM_L4SEC_CRYPTODMA_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x01dc) 528 529/* PRM.CEFUSE_PRM register offsets */ 530#define OMAP4_PM_CEFUSE_PWRSTCTRL_OFFSET 0x0000 531#define OMAP4430_PM_CEFUSE_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CEFUSE_INST, 0x0000) 532#define OMAP4_PM_CEFUSE_PWRSTST_OFFSET 0x0004 533#define OMAP4430_PM_CEFUSE_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CEFUSE_INST, 0x0004) 534#define OMAP4_RM_CEFUSE_CEFUSE_CONTEXT_OFFSET 0x0024 535#define OMAP4430_RM_CEFUSE_CEFUSE_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CEFUSE_INST, 0x0024) 536 537/* PRM.WKUP_PRM register offsets */ 538#define OMAP4_RM_WKUP_L4WKUP_CONTEXT_OFFSET 0x0024 539#define OMAP4430_RM_WKUP_L4WKUP_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x0024) 540#define OMAP4_RM_WKUP_WDT1_CONTEXT_OFFSET 0x002c 541#define OMAP4430_RM_WKUP_WDT1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x002c) 542#define OMAP4_PM_WKUP_WDT2_WKDEP_OFFSET 0x0030 543#define OMAP4430_PM_WKUP_WDT2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x0030) 544#define OMAP4_RM_WKUP_WDT2_CONTEXT_OFFSET 0x0034 545#define OMAP4430_RM_WKUP_WDT2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x0034) 546#define OMAP4_PM_WKUP_GPIO1_WKDEP_OFFSET 0x0038 547#define OMAP4430_PM_WKUP_GPIO1_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x0038) 548#define OMAP4_RM_WKUP_GPIO1_CONTEXT_OFFSET 0x003c 549#define OMAP4430_RM_WKUP_GPIO1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x003c) 550#define OMAP4_PM_WKUP_TIMER1_WKDEP_OFFSET 0x0040 551#define OMAP4430_PM_WKUP_TIMER1_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x0040) 552#define OMAP4_RM_WKUP_TIMER1_CONTEXT_OFFSET 0x0044 553#define OMAP4430_RM_WKUP_TIMER1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x0044) 554#define OMAP4_PM_WKUP_TIMER12_WKDEP_OFFSET 0x0048 555#define OMAP4430_PM_WKUP_TIMER12_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x0048) 556#define OMAP4_RM_WKUP_TIMER12_CONTEXT_OFFSET 0x004c 557#define OMAP4430_RM_WKUP_TIMER12_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x004c) 558#define OMAP4_RM_WKUP_SYNCTIMER_CONTEXT_OFFSET 0x0054 559#define OMAP4430_RM_WKUP_SYNCTIMER_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x0054) 560#define OMAP4_PM_WKUP_USIM_WKDEP_OFFSET 0x0058 561#define OMAP4430_PM_WKUP_USIM_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x0058) 562#define OMAP4_RM_WKUP_USIM_CONTEXT_OFFSET 0x005c 563#define OMAP4430_RM_WKUP_USIM_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x005c) 564#define OMAP4_RM_WKUP_SARRAM_CONTEXT_OFFSET 0x0064 565#define OMAP4430_RM_WKUP_SARRAM_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x0064) 566#define OMAP4_PM_WKUP_KEYBOARD_WKDEP_OFFSET 0x0078 567#define OMAP4430_PM_WKUP_KEYBOARD_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x0078) 568#define OMAP4_RM_WKUP_KEYBOARD_CONTEXT_OFFSET 0x007c 569#define OMAP4430_RM_WKUP_KEYBOARD_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x007c) 570#define OMAP4_PM_WKUP_RTC_WKDEP_OFFSET 0x0080 571#define OMAP4430_PM_WKUP_RTC_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x0080) 572#define OMAP4_RM_WKUP_RTC_CONTEXT_OFFSET 0x0084 573#define OMAP4430_RM_WKUP_RTC_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x0084) 574 575/* PRM.WKUP_CM register offsets */ 576#define OMAP4_CM_WKUP_CLKSTCTRL_OFFSET 0x0000 577#define OMAP4430_CM_WKUP_CLKSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_INST, 0x0000) 578#define OMAP4_CM_WKUP_L4WKUP_CLKCTRL_OFFSET 0x0020 579#define OMAP4430_CM_WKUP_L4WKUP_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_INST, 0x0020) 580#define OMAP4_CM_WKUP_WDT1_CLKCTRL_OFFSET 0x0028 581#define OMAP4430_CM_WKUP_WDT1_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_INST, 0x0028) 582#define OMAP4_CM_WKUP_WDT2_CLKCTRL_OFFSET 0x0030 583#define OMAP4430_CM_WKUP_WDT2_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_INST, 0x0030) 584#define OMAP4_CM_WKUP_GPIO1_CLKCTRL_OFFSET 0x0038 585#define OMAP4430_CM_WKUP_GPIO1_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_INST, 0x0038) 586#define OMAP4_CM_WKUP_TIMER1_CLKCTRL_OFFSET 0x0040 587#define OMAP4430_CM_WKUP_TIMER1_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_INST, 0x0040) 588#define OMAP4_CM_WKUP_TIMER12_CLKCTRL_OFFSET 0x0048 589#define OMAP4430_CM_WKUP_TIMER12_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_INST, 0x0048) 590#define OMAP4_CM_WKUP_SYNCTIMER_CLKCTRL_OFFSET 0x0050 591#define OMAP4430_CM_WKUP_SYNCTIMER_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_INST, 0x0050) 592#define OMAP4_CM_WKUP_USIM_CLKCTRL_OFFSET 0x0058 593#define OMAP4430_CM_WKUP_USIM_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_INST, 0x0058) 594#define OMAP4_CM_WKUP_SARRAM_CLKCTRL_OFFSET 0x0060 595#define OMAP4430_CM_WKUP_SARRAM_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_INST, 0x0060) 596#define OMAP4_CM_WKUP_KEYBOARD_CLKCTRL_OFFSET 0x0078 597#define OMAP4430_CM_WKUP_KEYBOARD_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_INST, 0x0078) 598#define OMAP4_CM_WKUP_RTC_CLKCTRL_OFFSET 0x0080 599#define OMAP4430_CM_WKUP_RTC_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_INST, 0x0080) 600#define OMAP4_CM_WKUP_BANDGAP_CLKCTRL_OFFSET 0x0088 601#define OMAP4430_CM_WKUP_BANDGAP_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_INST, 0x0088) 602 603/* PRM.EMU_PRM register offsets */ 604#define OMAP4_PM_EMU_PWRSTCTRL_OFFSET 0x0000 605#define OMAP4430_PM_EMU_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_EMU_INST, 0x0000) 606#define OMAP4_PM_EMU_PWRSTST_OFFSET 0x0004 607#define OMAP4430_PM_EMU_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_EMU_INST, 0x0004) 608#define OMAP4_RM_EMU_DEBUGSS_CONTEXT_OFFSET 0x0024 609#define OMAP4430_RM_EMU_DEBUGSS_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_EMU_INST, 0x0024) 610 611/* PRM.EMU_CM register offsets */ 612#define OMAP4_CM_EMU_CLKSTCTRL_OFFSET 0x0000 613#define OMAP4430_CM_EMU_CLKSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_EMU_CM_INST, 0x0000) 614#define OMAP4_CM_EMU_DYNAMICDEP_OFFSET 0x0008 615#define OMAP4430_CM_EMU_DYNAMICDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_EMU_CM_INST, 0x0008) 616#define OMAP4_CM_EMU_DEBUGSS_CLKCTRL_OFFSET 0x0020 617#define OMAP4430_CM_EMU_DEBUGSS_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_EMU_CM_INST, 0x0020) 618 619/* PRM.DEVICE_PRM register offsets */ 620#define OMAP4_PRM_RSTCTRL_OFFSET 0x0000 621#define OMAP4430_PRM_RSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0000) 622#define OMAP4_PRM_RSTST_OFFSET 0x0004 623#define OMAP4430_PRM_RSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0004) 624#define OMAP4_PRM_RSTTIME_OFFSET 0x0008 625#define OMAP4430_PRM_RSTTIME OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0008) 626#define OMAP4_PRM_CLKREQCTRL_OFFSET 0x000c 627#define OMAP4430_PRM_CLKREQCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x000c) 628#define OMAP4_PRM_VOLTCTRL_OFFSET 0x0010 629#define OMAP4430_PRM_VOLTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0010) 630#define OMAP4_PRM_PWRREQCTRL_OFFSET 0x0014 631#define OMAP4430_PRM_PWRREQCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0014) 632#define OMAP4_PRM_PSCON_COUNT_OFFSET 0x0018 633#define OMAP4430_PRM_PSCON_COUNT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0018) 634#define OMAP4_PRM_IO_COUNT_OFFSET 0x001c 635#define OMAP4430_PRM_IO_COUNT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x001c) 636#define OMAP4_PRM_IO_PMCTRL_OFFSET 0x0020 637#define OMAP4430_PRM_IO_PMCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0020) 638#define OMAP4_PRM_VOLTSETUP_WARMRESET_OFFSET 0x0024 639#define OMAP4430_PRM_VOLTSETUP_WARMRESET OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0024) 640#define OMAP4_PRM_VOLTSETUP_CORE_OFF_OFFSET 0x0028 641#define OMAP4430_PRM_VOLTSETUP_CORE_OFF OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0028) 642#define OMAP4_PRM_VOLTSETUP_MPU_OFF_OFFSET 0x002c 643#define OMAP4430_PRM_VOLTSETUP_MPU_OFF OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x002c) 644#define OMAP4_PRM_VOLTSETUP_IVA_OFF_OFFSET 0x0030 645#define OMAP4430_PRM_VOLTSETUP_IVA_OFF OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0030) 646#define OMAP4_PRM_VOLTSETUP_CORE_RET_SLEEP_OFFSET 0x0034 647#define OMAP4430_PRM_VOLTSETUP_CORE_RET_SLEEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0034) 648#define OMAP4_PRM_VOLTSETUP_MPU_RET_SLEEP_OFFSET 0x0038 649#define OMAP4430_PRM_VOLTSETUP_MPU_RET_SLEEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0038) 650#define OMAP4_PRM_VOLTSETUP_IVA_RET_SLEEP_OFFSET 0x003c 651#define OMAP4430_PRM_VOLTSETUP_IVA_RET_SLEEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x003c) 652#define OMAP4_PRM_VP_CORE_CONFIG_OFFSET 0x0040 653#define OMAP4430_PRM_VP_CORE_CONFIG OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0040) 654#define OMAP4_PRM_VP_CORE_STATUS_OFFSET 0x0044 655#define OMAP4430_PRM_VP_CORE_STATUS OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0044) 656#define OMAP4_PRM_VP_CORE_VLIMITTO_OFFSET 0x0048 657#define OMAP4430_PRM_VP_CORE_VLIMITTO OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0048) 658#define OMAP4_PRM_VP_CORE_VOLTAGE_OFFSET 0x004c 659#define OMAP4430_PRM_VP_CORE_VOLTAGE OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x004c) 660#define OMAP4_PRM_VP_CORE_VSTEPMAX_OFFSET 0x0050 661#define OMAP4430_PRM_VP_CORE_VSTEPMAX OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0050) 662#define OMAP4_PRM_VP_CORE_VSTEPMIN_OFFSET 0x0054 663#define OMAP4430_PRM_VP_CORE_VSTEPMIN OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0054) 664#define OMAP4_PRM_VP_MPU_CONFIG_OFFSET 0x0058 665#define OMAP4430_PRM_VP_MPU_CONFIG OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0058) 666#define OMAP4_PRM_VP_MPU_STATUS_OFFSET 0x005c 667#define OMAP4430_PRM_VP_MPU_STATUS OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x005c) 668#define OMAP4_PRM_VP_MPU_VLIMITTO_OFFSET 0x0060 669#define OMAP4430_PRM_VP_MPU_VLIMITTO OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0060) 670#define OMAP4_PRM_VP_MPU_VOLTAGE_OFFSET 0x0064 671#define OMAP4430_PRM_VP_MPU_VOLTAGE OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0064) 672#define OMAP4_PRM_VP_MPU_VSTEPMAX_OFFSET 0x0068 673#define OMAP4430_PRM_VP_MPU_VSTEPMAX OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0068) 674#define OMAP4_PRM_VP_MPU_VSTEPMIN_OFFSET 0x006c 675#define OMAP4430_PRM_VP_MPU_VSTEPMIN OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x006c) 676#define OMAP4_PRM_VP_IVA_CONFIG_OFFSET 0x0070 677#define OMAP4430_PRM_VP_IVA_CONFIG OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0070) 678#define OMAP4_PRM_VP_IVA_STATUS_OFFSET 0x0074 679#define OMAP4430_PRM_VP_IVA_STATUS OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0074) 680#define OMAP4_PRM_VP_IVA_VLIMITTO_OFFSET 0x0078 681#define OMAP4430_PRM_VP_IVA_VLIMITTO OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0078) 682#define OMAP4_PRM_VP_IVA_VOLTAGE_OFFSET 0x007c 683#define OMAP4430_PRM_VP_IVA_VOLTAGE OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x007c) 684#define OMAP4_PRM_VP_IVA_VSTEPMAX_OFFSET 0x0080 685#define OMAP4430_PRM_VP_IVA_VSTEPMAX OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0080) 686#define OMAP4_PRM_VP_IVA_VSTEPMIN_OFFSET 0x0084 687#define OMAP4430_PRM_VP_IVA_VSTEPMIN OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0084) 688#define OMAP4_PRM_VC_SMPS_SA_OFFSET 0x0088 689#define OMAP4430_PRM_VC_SMPS_SA OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0088) 690#define OMAP4_PRM_VC_VAL_SMPS_RA_VOL_OFFSET 0x008c 691#define OMAP4430_PRM_VC_VAL_SMPS_RA_VOL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x008c) 692#define OMAP4_PRM_VC_VAL_SMPS_RA_CMD_OFFSET 0x0090 693#define OMAP4430_PRM_VC_VAL_SMPS_RA_CMD OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0090) 694#define OMAP4_PRM_VC_VAL_CMD_VDD_CORE_L_OFFSET 0x0094 695#define OMAP4430_PRM_VC_VAL_CMD_VDD_CORE_L OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0094) 696#define OMAP4_PRM_VC_VAL_CMD_VDD_MPU_L_OFFSET 0x0098 697#define OMAP4430_PRM_VC_VAL_CMD_VDD_MPU_L OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0098) 698#define OMAP4_PRM_VC_VAL_CMD_VDD_IVA_L_OFFSET 0x009c 699#define OMAP4430_PRM_VC_VAL_CMD_VDD_IVA_L OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x009c) 700#define OMAP4_PRM_VC_VAL_BYPASS_OFFSET 0x00a0 701#define OMAP4430_PRM_VC_VAL_BYPASS OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00a0) 702#define OMAP4_PRM_VC_CFG_CHANNEL_OFFSET 0x00a4 703#define OMAP4430_PRM_VC_CFG_CHANNEL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00a4) 704#define OMAP4_PRM_VC_CFG_I2C_MODE_OFFSET 0x00a8 705#define OMAP4430_PRM_VC_CFG_I2C_MODE OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00a8) 706#define OMAP4_PRM_VC_CFG_I2C_CLK_OFFSET 0x00ac 707#define OMAP4430_PRM_VC_CFG_I2C_CLK OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00ac) 708#define OMAP4_PRM_SRAM_COUNT_OFFSET 0x00b0 709#define OMAP4430_PRM_SRAM_COUNT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00b0) 710#define OMAP4_PRM_SRAM_WKUP_SETUP_OFFSET 0x00b4 711#define OMAP4430_PRM_SRAM_WKUP_SETUP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00b4) 712#define OMAP4_PRM_LDO_SRAM_CORE_SETUP_OFFSET 0x00b8 713#define OMAP4430_PRM_LDO_SRAM_CORE_SETUP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00b8) 714#define OMAP4_PRM_LDO_SRAM_CORE_CTRL_OFFSET 0x00bc 715#define OMAP4430_PRM_LDO_SRAM_CORE_CTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00bc) 716#define OMAP4_PRM_LDO_SRAM_MPU_SETUP_OFFSET 0x00c0 717#define OMAP4430_PRM_LDO_SRAM_MPU_SETUP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00c0) 718#define OMAP4_PRM_LDO_SRAM_MPU_CTRL_OFFSET 0x00c4 719#define OMAP4430_PRM_LDO_SRAM_MPU_CTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00c4) 720#define OMAP4_PRM_LDO_SRAM_IVA_SETUP_OFFSET 0x00c8 721#define OMAP4430_PRM_LDO_SRAM_IVA_SETUP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00c8) 722#define OMAP4_PRM_LDO_SRAM_IVA_CTRL_OFFSET 0x00cc 723#define OMAP4430_PRM_LDO_SRAM_IVA_CTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00cc) 724#define OMAP4_PRM_LDO_ABB_MPU_SETUP_OFFSET 0x00d0 725#define OMAP4430_PRM_LDO_ABB_MPU_SETUP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00d0) 726#define OMAP4_PRM_LDO_ABB_MPU_CTRL_OFFSET 0x00d4 727#define OMAP4430_PRM_LDO_ABB_MPU_CTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00d4) 728#define OMAP4_PRM_LDO_ABB_IVA_SETUP_OFFSET 0x00d8 729#define OMAP4430_PRM_LDO_ABB_IVA_SETUP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00d8) 730#define OMAP4_PRM_LDO_ABB_IVA_CTRL_OFFSET 0x00dc 731#define OMAP4430_PRM_LDO_ABB_IVA_CTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00dc) 732#define OMAP4_PRM_LDO_BANDGAP_SETUP_OFFSET 0x00e0 733#define OMAP4430_PRM_LDO_BANDGAP_SETUP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00e0) 734#define OMAP4_PRM_DEVICE_OFF_CTRL_OFFSET 0x00e4 735#define OMAP4430_PRM_DEVICE_OFF_CTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00e4) 736#define OMAP4_PRM_PHASE1_CNDP_OFFSET 0x00e8 737#define OMAP4430_PRM_PHASE1_CNDP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00e8) 738#define OMAP4_PRM_PHASE2A_CNDP_OFFSET 0x00ec 739#define OMAP4430_PRM_PHASE2A_CNDP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00ec) 740#define OMAP4_PRM_PHASE2B_CNDP_OFFSET 0x00f0 741#define OMAP4430_PRM_PHASE2B_CNDP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00f0) 742#define OMAP4_PRM_MODEM_IF_CTRL_OFFSET 0x00f4 743#define OMAP4430_PRM_MODEM_IF_CTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00f4) 744#define OMAP4_PRM_VC_ERRST_OFFSET 0x00f8 745#define OMAP4430_PRM_VC_ERRST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00f8) 746 747#endif 748