1/*
2 * omap_hwmod_2xxx_3xxx_interconnect_data.c - common interconnect data, OMAP2/3
3 *
4 * Copyright (C) 2009-2011 Nokia Corporation
5 * Paul Walmsley
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * XXX handle crossbar/shared link difference for L3?
12 * XXX these should be marked initdata for multi-OMAP kernels
13 */
14#include <asm/sizes.h>
15
16#include "omap_hwmod.h"
17
18#include "omap_hwmod_common_data.h"
19
20struct omap_hwmod_addr_space omap2430_mmc1_addr_space[] = {
21	{
22		.pa_start	= 0x4809c000,
23		.pa_end		= 0x4809c1ff,
24		.flags		= ADDR_TYPE_RT,
25	},
26	{ }
27};
28
29struct omap_hwmod_addr_space omap2430_mmc2_addr_space[] = {
30	{
31		.pa_start	= 0x480b4000,
32		.pa_end		= 0x480b41ff,
33		.flags		= ADDR_TYPE_RT,
34	},
35	{ }
36};
37
38struct omap_hwmod_addr_space omap2_i2c1_addr_space[] = {
39	{
40		.pa_start	= 0x48070000,
41		.pa_end		= 0x48070000 + SZ_128 - 1,
42		.flags		= ADDR_TYPE_RT,
43	},
44	{ }
45};
46
47struct omap_hwmod_addr_space omap2_i2c2_addr_space[] = {
48	{
49		.pa_start	= 0x48072000,
50		.pa_end		= 0x48072000 + SZ_128 - 1,
51		.flags		= ADDR_TYPE_RT,
52	},
53	{ }
54};
55
56struct omap_hwmod_addr_space omap2_dss_addrs[] = {
57	{
58		.pa_start	= 0x48050000,
59		.pa_end		= 0x48050000 + SZ_1K - 1,
60		.flags		= ADDR_TYPE_RT
61	},
62	{ }
63};
64
65struct omap_hwmod_addr_space omap2_dss_dispc_addrs[] = {
66	{
67		.pa_start	= 0x48050400,
68		.pa_end		= 0x48050400 + SZ_1K - 1,
69		.flags		= ADDR_TYPE_RT
70	},
71	{ }
72};
73
74struct omap_hwmod_addr_space omap2_dss_rfbi_addrs[] = {
75	{
76		.pa_start	= 0x48050800,
77		.pa_end		= 0x48050800 + SZ_1K - 1,
78		.flags		= ADDR_TYPE_RT
79	},
80	{ }
81};
82
83struct omap_hwmod_addr_space omap2_dss_venc_addrs[] = {
84	{
85		.pa_start	= 0x48050C00,
86		.pa_end		= 0x48050C00 + SZ_1K - 1,
87		.flags		= ADDR_TYPE_RT
88	},
89	{ }
90};
91
92struct omap_hwmod_addr_space omap2_timer10_addrs[] = {
93	{
94		.pa_start	= 0x48086000,
95		.pa_end		= 0x48086000 + SZ_1K - 1,
96		.flags		= ADDR_TYPE_RT
97	},
98	{ }
99};
100
101struct omap_hwmod_addr_space omap2_timer11_addrs[] = {
102	{
103		.pa_start	= 0x48088000,
104		.pa_end		= 0x48088000 + SZ_1K - 1,
105		.flags		= ADDR_TYPE_RT
106	},
107	{ }
108};
109
110struct omap_hwmod_addr_space omap2xxx_timer12_addrs[] = {
111	{
112		.pa_start	= 0x4808a000,
113		.pa_end		= 0x4808a000 + SZ_1K - 1,
114		.flags		= ADDR_TYPE_RT
115	},
116	{ }
117};
118
119struct omap_hwmod_addr_space omap2_mcspi1_addr_space[] = {
120	{
121		.pa_start	= 0x48098000,
122		.pa_end		= 0x48098000 + SZ_256 - 1,
123		.flags		= ADDR_TYPE_RT,
124	},
125	{ }
126};
127
128struct omap_hwmod_addr_space omap2_mcspi2_addr_space[] = {
129	{
130		.pa_start	= 0x4809a000,
131		.pa_end		= 0x4809a000 + SZ_256 - 1,
132		.flags		= ADDR_TYPE_RT,
133	},
134	{ }
135};
136
137struct omap_hwmod_addr_space omap2430_mcspi3_addr_space[] = {
138	{
139		.pa_start	= 0x480b8000,
140		.pa_end		= 0x480b8000 + SZ_256 - 1,
141		.flags		= ADDR_TYPE_RT,
142	},
143	{ }
144};
145
146struct omap_hwmod_addr_space omap2_dma_system_addrs[] = {
147	{
148		.pa_start	= 0x48056000,
149		.pa_end		= 0x48056000 + SZ_4K - 1,
150		.flags		= ADDR_TYPE_RT
151	},
152	{ }
153};
154
155struct omap_hwmod_addr_space omap2_mcbsp1_addrs[] = {
156	{
157		.name		= "mpu",
158		.pa_start	= 0x48074000,
159		.pa_end		= 0x480740ff,
160		.flags		= ADDR_TYPE_RT
161	},
162	{ }
163};
164
165struct omap_hwmod_addr_space omap2_hdq1w_addr_space[] = {
166	{
167		.pa_start       = 0x480b2000,
168		.pa_end         = 0x480b2fff,
169		.flags          = ADDR_TYPE_RT,
170	},
171	{ }
172};
173