1/*
2 * Copyright 2004-2014 Freescale Semiconductor, Inc. All Rights Reserved.
3 */
4
5/*
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __ASM_ARCH_MXC_COMMON_H__
12#define __ASM_ARCH_MXC_COMMON_H__
13
14#include <linux/reboot.h>
15
16struct irq_data;
17struct platform_device;
18struct pt_regs;
19struct clk;
20struct device_node;
21enum mxc_cpu_pwr_mode;
22struct of_device_id;
23
24void mx1_map_io(void);
25void mx21_map_io(void);
26void mx27_map_io(void);
27void mx31_map_io(void);
28void mx35_map_io(void);
29void imx1_init_early(void);
30void imx21_init_early(void);
31void imx27_init_early(void);
32void imx31_init_early(void);
33void imx35_init_early(void);
34void mxc_init_irq(void __iomem *);
35void tzic_init_irq(void);
36void mx1_init_irq(void);
37void mx21_init_irq(void);
38void mx27_init_irq(void);
39void mx31_init_irq(void);
40void mx35_init_irq(void);
41void imx1_soc_init(void);
42void imx21_soc_init(void);
43void imx27_soc_init(void);
44void imx31_soc_init(void);
45void imx35_soc_init(void);
46void epit_timer_init(void __iomem *base, int irq);
47void mxc_timer_init(void __iomem *, int);
48int mx1_clocks_init(unsigned long fref);
49int mx21_clocks_init(unsigned long lref, unsigned long fref);
50int mx27_clocks_init(unsigned long fref);
51int mx31_clocks_init(unsigned long fref);
52int mx35_clocks_init(void);
53int mx31_clocks_init_dt(void);
54struct platform_device *mxc_register_gpio(char *name, int id,
55	resource_size_t iobase, resource_size_t iosize, int irq, int irq_high);
56void mxc_set_cpu_type(unsigned int type);
57void mxc_restart(enum reboot_mode, const char *);
58void mxc_arch_reset_init(void __iomem *);
59int mx51_revision(void);
60int mx53_revision(void);
61void imx_set_aips(void __iomem *);
62void imx_aips_allow_unprivileged_access(const char *compat);
63int mxc_device_init(void);
64void imx_set_soc_revision(unsigned int rev);
65unsigned int imx_get_soc_revision(void);
66void imx_init_revision_from_anatop(void);
67struct device *imx_soc_device_init(void);
68void imx6_enable_rbc(bool enable);
69void imx_gpc_check_dt(void);
70void imx_gpc_set_arm_power_in_lpm(bool power_off);
71void imx_gpc_set_arm_power_up_timing(u32 sw2iso, u32 sw);
72void imx_gpc_set_arm_power_down_timing(u32 sw2iso, u32 sw);
73
74enum mxc_cpu_pwr_mode {
75	WAIT_CLOCKED,		/* wfi only */
76	WAIT_UNCLOCKED,		/* WAIT */
77	WAIT_UNCLOCKED_POWER_OFF,	/* WAIT + SRPG */
78	STOP_POWER_ON,		/* just STOP */
79	STOP_POWER_OFF,		/* STOP + SRPG */
80};
81
82enum mx3_cpu_pwr_mode {
83	MX3_RUN,
84	MX3_WAIT,
85	MX3_DOZE,
86	MX3_SLEEP,
87};
88
89void mx3_cpu_lp_set(enum mx3_cpu_pwr_mode mode);
90void imx_print_silicon_rev(const char *cpu, int srev);
91
92void imx_enable_cpu(int cpu, bool enable);
93void imx_set_cpu_jump(int cpu, void *jump_addr);
94u32 imx_get_cpu_arg(int cpu);
95void imx_set_cpu_arg(int cpu, u32 arg);
96#ifdef CONFIG_SMP
97void v7_secondary_startup(void);
98void imx_scu_map_io(void);
99void imx_smp_prepare(void);
100#else
101static inline void imx_scu_map_io(void) {}
102static inline void imx_smp_prepare(void) {}
103#endif
104void imx_src_init(void);
105void imx_gpc_pre_suspend(bool arm_power_off);
106void imx_gpc_post_resume(void);
107void imx_gpc_mask_all(void);
108void imx_gpc_restore_all(void);
109void imx_gpc_hwirq_mask(unsigned int hwirq);
110void imx_gpc_hwirq_unmask(unsigned int hwirq);
111void imx_anatop_init(void);
112void imx_anatop_pre_suspend(void);
113void imx_anatop_post_resume(void);
114int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode);
115void imx6q_set_int_mem_clk_lpm(bool enable);
116void imx6sl_set_wait_clk(bool enter);
117int imx_mmdc_get_ddr_type(void);
118
119void imx_cpu_die(unsigned int cpu);
120int imx_cpu_kill(unsigned int cpu);
121
122#ifdef CONFIG_SUSPEND
123void v7_cpu_resume(void);
124void imx6_suspend(void __iomem *ocram_vbase);
125#else
126static inline void v7_cpu_resume(void) {}
127static inline void imx6_suspend(void __iomem *ocram_vbase) {}
128#endif
129
130void imx6q_pm_init(void);
131void imx6dl_pm_init(void);
132void imx6sl_pm_init(void);
133void imx6sx_pm_init(void);
134void imx6q_pm_set_ccm_base(void __iomem *base);
135
136#ifdef CONFIG_PM
137void imx51_pm_init(void);
138void imx53_pm_init(void);
139void imx5_pm_set_ccm_base(void __iomem *base);
140#else
141static inline void imx51_pm_init(void) {}
142static inline void imx53_pm_init(void) {}
143static inline void imx5_pm_set_ccm_base(void __iomem *base) {}
144#endif
145
146#ifdef CONFIG_NEON
147int mx51_neon_fixup(void);
148#else
149static inline int mx51_neon_fixup(void) { return 0; }
150#endif
151
152#ifdef CONFIG_CACHE_L2X0
153void imx_init_l2cache(void);
154#else
155static inline void imx_init_l2cache(void) {}
156#endif
157
158extern struct smp_operations imx_smp_ops;
159extern struct smp_operations ls1021a_smp_ops;
160
161#endif
162