1/*
2 * SAMSUNG EXYNOS Flattened Device Tree enabled machine
3 *
4 * Copyright (c) 2010-2014 Samsung Electronics Co., Ltd.
5 *		http://www.samsung.com
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#include <linux/init.h>
13#include <linux/io.h>
14#include <linux/kernel.h>
15#include <linux/serial_s3c.h>
16#include <linux/of.h>
17#include <linux/of_address.h>
18#include <linux/of_fdt.h>
19#include <linux/of_platform.h>
20#include <linux/platform_device.h>
21#include <linux/pm_domain.h>
22#include <linux/irqchip.h>
23
24#include <asm/cacheflush.h>
25#include <asm/hardware/cache-l2x0.h>
26#include <asm/mach/arch.h>
27#include <asm/mach/map.h>
28#include <asm/memory.h>
29
30#include <mach/map.h>
31
32#include "common.h"
33#include "mfc.h"
34#include "regs-pmu.h"
35
36void __iomem *pmu_base_addr;
37
38static struct map_desc exynos4_iodesc[] __initdata = {
39	{
40		.virtual	= (unsigned long)S5P_VA_SROMC,
41		.pfn		= __phys_to_pfn(EXYNOS4_PA_SROMC),
42		.length		= SZ_4K,
43		.type		= MT_DEVICE,
44	}, {
45		.virtual	= (unsigned long)S5P_VA_CMU,
46		.pfn		= __phys_to_pfn(EXYNOS4_PA_CMU),
47		.length		= SZ_128K,
48		.type		= MT_DEVICE,
49	}, {
50		.virtual	= (unsigned long)S5P_VA_COREPERI_BASE,
51		.pfn		= __phys_to_pfn(EXYNOS4_PA_COREPERI),
52		.length		= SZ_8K,
53		.type		= MT_DEVICE,
54	}, {
55		.virtual	= (unsigned long)S5P_VA_DMC0,
56		.pfn		= __phys_to_pfn(EXYNOS4_PA_DMC0),
57		.length		= SZ_64K,
58		.type		= MT_DEVICE,
59	}, {
60		.virtual	= (unsigned long)S5P_VA_DMC1,
61		.pfn		= __phys_to_pfn(EXYNOS4_PA_DMC1),
62		.length		= SZ_64K,
63		.type		= MT_DEVICE,
64	},
65};
66
67static struct map_desc exynos5_iodesc[] __initdata = {
68	{
69		.virtual	= (unsigned long)S5P_VA_SROMC,
70		.pfn		= __phys_to_pfn(EXYNOS5_PA_SROMC),
71		.length		= SZ_4K,
72		.type		= MT_DEVICE,
73	}, {
74		.virtual	= (unsigned long)S5P_VA_CMU,
75		.pfn		= __phys_to_pfn(EXYNOS5_PA_CMU),
76		.length		= 144 * SZ_1K,
77		.type		= MT_DEVICE,
78	},
79};
80
81static struct platform_device exynos_cpuidle = {
82	.name              = "exynos_cpuidle",
83#ifdef CONFIG_ARM_EXYNOS_CPUIDLE
84	.dev.platform_data = exynos_enter_aftr,
85#endif
86	.id                = -1,
87};
88
89void __iomem *sysram_base_addr;
90void __iomem *sysram_ns_base_addr;
91
92void __init exynos_sysram_init(void)
93{
94	struct device_node *node;
95
96	for_each_compatible_node(node, NULL, "samsung,exynos4210-sysram") {
97		if (!of_device_is_available(node))
98			continue;
99		sysram_base_addr = of_iomap(node, 0);
100		break;
101	}
102
103	for_each_compatible_node(node, NULL, "samsung,exynos4210-sysram-ns") {
104		if (!of_device_is_available(node))
105			continue;
106		sysram_ns_base_addr = of_iomap(node, 0);
107		break;
108	}
109}
110
111static void __init exynos_init_late(void)
112{
113	if (of_machine_is_compatible("samsung,exynos5440"))
114		/* to be supported later */
115		return;
116
117	exynos_pm_init();
118}
119
120static int __init exynos_fdt_map_chipid(unsigned long node, const char *uname,
121					int depth, void *data)
122{
123	struct map_desc iodesc;
124	const __be32 *reg;
125	int len;
126
127	if (!of_flat_dt_is_compatible(node, "samsung,exynos4210-chipid") &&
128		!of_flat_dt_is_compatible(node, "samsung,exynos5440-clock"))
129		return 0;
130
131	reg = of_get_flat_dt_prop(node, "reg", &len);
132	if (reg == NULL || len != (sizeof(unsigned long) * 2))
133		return 0;
134
135	iodesc.pfn = __phys_to_pfn(be32_to_cpu(reg[0]));
136	iodesc.length = be32_to_cpu(reg[1]) - 1;
137	iodesc.virtual = (unsigned long)S5P_VA_CHIPID;
138	iodesc.type = MT_DEVICE;
139	iotable_init(&iodesc, 1);
140	return 1;
141}
142
143/*
144 * exynos_map_io
145 *
146 * register the standard cpu IO areas
147 */
148static void __init exynos_map_io(void)
149{
150	if (soc_is_exynos4())
151		iotable_init(exynos4_iodesc, ARRAY_SIZE(exynos4_iodesc));
152
153	if (soc_is_exynos5())
154		iotable_init(exynos5_iodesc, ARRAY_SIZE(exynos5_iodesc));
155}
156
157static void __init exynos_init_io(void)
158{
159	debug_ll_io_init();
160
161	of_scan_flat_dt(exynos_fdt_map_chipid, NULL);
162
163	/* detect cpu id and rev. */
164	s5p_init_cpu(S5P_VA_CHIPID);
165
166	exynos_map_io();
167}
168
169/*
170 * Set or clear the USE_DELAYED_RESET_ASSERTION option. Used by smp code
171 * and suspend.
172 *
173 * This is necessary only on Exynos4 SoCs. When system is running
174 * USE_DELAYED_RESET_ASSERTION should be set so the ARM CLK clock down
175 * feature could properly detect global idle state when secondary CPU is
176 * powered down.
177 *
178 * However this should not be set when such system is going into suspend.
179 */
180void exynos_set_delayed_reset_assertion(bool enable)
181{
182	if (of_machine_is_compatible("samsung,exynos4")) {
183		unsigned int tmp, core_id;
184
185		for (core_id = 0; core_id < num_possible_cpus(); core_id++) {
186			tmp = pmu_raw_readl(EXYNOS_ARM_CORE_OPTION(core_id));
187			if (enable)
188				tmp |= S5P_USE_DELAYED_RESET_ASSERTION;
189			else
190				tmp &= ~(S5P_USE_DELAYED_RESET_ASSERTION);
191			pmu_raw_writel(tmp, EXYNOS_ARM_CORE_OPTION(core_id));
192		}
193	}
194}
195
196/*
197 * Apparently, these SoCs are not able to wake-up from suspend using
198 * the PMU. Too bad. Should they suddenly become capable of such a
199 * feat, the matches below should be moved to suspend.c.
200 */
201static const struct of_device_id exynos_dt_pmu_match[] = {
202	{ .compatible = "samsung,exynos5260-pmu" },
203	{ .compatible = "samsung,exynos5410-pmu" },
204	{ /*sentinel*/ },
205};
206
207static void exynos_map_pmu(void)
208{
209	struct device_node *np;
210
211	np = of_find_matching_node(NULL, exynos_dt_pmu_match);
212	if (np)
213		pmu_base_addr = of_iomap(np, 0);
214}
215
216static void __init exynos_init_irq(void)
217{
218	irqchip_init();
219	/*
220	 * Since platsmp.c needs pmu base address by the time
221	 * DT is not unflatten so we can't use DT APIs before
222	 * init_irq
223	 */
224	exynos_map_pmu();
225}
226
227static void __init exynos_dt_machine_init(void)
228{
229	/*
230	 * This is called from smp_prepare_cpus if we've built for SMP, but
231	 * we still need to set it up for PM and firmware ops if not.
232	 */
233	if (!IS_ENABLED(CONFIG_SMP))
234		exynos_sysram_init();
235
236#if defined(CONFIG_SMP) && defined(CONFIG_ARM_EXYNOS_CPUIDLE)
237	if (of_machine_is_compatible("samsung,exynos4210"))
238		exynos_cpuidle.dev.platform_data = &cpuidle_coupled_exynos_data;
239#endif
240	if (of_machine_is_compatible("samsung,exynos4210") ||
241	    of_machine_is_compatible("samsung,exynos4212") ||
242	    (of_machine_is_compatible("samsung,exynos4412") &&
243	     of_machine_is_compatible("samsung,trats2")) ||
244	    of_machine_is_compatible("samsung,exynos3250") ||
245	    of_machine_is_compatible("samsung,exynos5250"))
246		platform_device_register(&exynos_cpuidle);
247
248	platform_device_register_simple("exynos-cpufreq", -1, NULL, 0);
249
250	of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
251}
252
253static char const *const exynos_dt_compat[] __initconst = {
254	"samsung,exynos3",
255	"samsung,exynos3250",
256	"samsung,exynos4",
257	"samsung,exynos4210",
258	"samsung,exynos4212",
259	"samsung,exynos4412",
260	"samsung,exynos4415",
261	"samsung,exynos5",
262	"samsung,exynos5250",
263	"samsung,exynos5260",
264	"samsung,exynos5420",
265	"samsung,exynos5440",
266	NULL
267};
268
269static void __init exynos_reserve(void)
270{
271#ifdef CONFIG_S5P_DEV_MFC
272	int i;
273	char *mfc_mem[] = {
274		"samsung,mfc-v5",
275		"samsung,mfc-v6",
276		"samsung,mfc-v7",
277		"samsung,mfc-v8",
278	};
279
280	for (i = 0; i < ARRAY_SIZE(mfc_mem); i++)
281		if (of_scan_flat_dt(s5p_fdt_alloc_mfc_mem, mfc_mem[i]))
282			break;
283#endif
284}
285
286static void __init exynos_dt_fixup(void)
287{
288	/*
289	 * Some versions of uboot pass garbage entries in the memory node,
290	 * use the old CONFIG_ARM_NR_BANKS
291	 */
292	of_fdt_limit_memory(8);
293}
294
295DT_MACHINE_START(EXYNOS_DT, "SAMSUNG EXYNOS (Flattened Device Tree)")
296	/* Maintainer: Thomas Abraham <thomas.abraham@linaro.org> */
297	/* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
298	.l2c_aux_val	= 0x3c400001,
299	.l2c_aux_mask	= 0xc20fffff,
300	.smp		= smp_ops(exynos_smp_ops),
301	.map_io		= exynos_init_io,
302	.init_early	= exynos_firmware_init,
303	.init_irq	= exynos_init_irq,
304	.init_machine	= exynos_dt_machine_init,
305	.init_late	= exynos_init_late,
306	.dt_compat	= exynos_dt_compat,
307	.reserve	= exynos_reserve,
308	.dt_fixup	= exynos_dt_fixup,
309MACHINE_END
310