1/* 2 * Device Tree for the ST-Ericsson Nomadik 8815 STn8815 SoC 3 */ 4 5#include <dt-bindings/gpio/gpio.h> 6#include "skeleton.dtsi" 7 8/ { 9 #address-cells = <1>; 10 #size-cells = <1>; 11 12 memory { 13 reg = <0x00000000 0x04000000>, 14 <0x08000000 0x04000000>; 15 }; 16 17 L2: l2-cache { 18 compatible = "arm,l210-cache"; 19 reg = <0x10210000 0x1000>; 20 interrupt-parent = <&vica>; 21 interrupts = <30>; 22 cache-unified; 23 cache-level = <2>; 24 }; 25 26 mtu0: mtu@101e2000 { 27 /* Nomadik system timer */ 28 compatible = "st,nomadik-mtu"; 29 reg = <0x101e2000 0x1000>; 30 interrupt-parent = <&vica>; 31 interrupts = <4>; 32 clocks = <&timclk>, <&pclk>; 33 clock-names = "timclk", "apb_pclk"; 34 }; 35 36 mtu1: mtu@101e3000 { 37 /* Secondary timer */ 38 reg = <0x101e3000 0x1000>; 39 interrupt-parent = <&vica>; 40 interrupts = <5>; 41 clocks = <&timclk>, <&pclk>; 42 clock-names = "timclk", "apb_pclk"; 43 }; 44 45 gpio0: gpio@101e4000 { 46 compatible = "st,nomadik-gpio"; 47 reg = <0x101e4000 0x80>; 48 interrupt-parent = <&vica>; 49 interrupts = <6>; 50 interrupt-controller; 51 #interrupt-cells = <2>; 52 gpio-controller; 53 #gpio-cells = <2>; 54 gpio-bank = <0>; 55 clocks = <&pclk>; 56 }; 57 58 gpio1: gpio@101e5000 { 59 compatible = "st,nomadik-gpio"; 60 reg = <0x101e5000 0x80>; 61 interrupt-parent = <&vica>; 62 interrupts = <7>; 63 interrupt-controller; 64 #interrupt-cells = <2>; 65 gpio-controller; 66 #gpio-cells = <2>; 67 gpio-bank = <1>; 68 clocks = <&pclk>; 69 }; 70 71 gpio2: gpio@101e6000 { 72 compatible = "st,nomadik-gpio"; 73 reg = <0x101e6000 0x80>; 74 interrupt-parent = <&vica>; 75 interrupts = <8>; 76 interrupt-controller; 77 #interrupt-cells = <2>; 78 gpio-controller; 79 #gpio-cells = <2>; 80 gpio-bank = <2>; 81 clocks = <&pclk>; 82 }; 83 84 gpio3: gpio@101e7000 { 85 compatible = "st,nomadik-gpio"; 86 reg = <0x101e7000 0x80>; 87 interrupt-parent = <&vica>; 88 interrupts = <9>; 89 interrupt-controller; 90 #interrupt-cells = <2>; 91 gpio-controller; 92 #gpio-cells = <2>; 93 gpio-bank = <3>; 94 clocks = <&pclk>; 95 }; 96 97 pinctrl { 98 compatible = "stericsson,stn8815-pinctrl"; 99 /* Pin configurations */ 100 uart0 { 101 uart0_default_mux: uart0_mux { 102 u0_default_mux { 103 function = "u0"; 104 groups = "u0_a_1"; 105 }; 106 }; 107 }; 108 uart1 { 109 uart1_default_mux: uart1_mux { 110 u1_default_mux { 111 function = "u1"; 112 groups = "u1_a_1"; 113 }; 114 }; 115 }; 116 mmcsd { 117 mmcsd_default_mux: mmcsd_mux { 118 mmcsd_default_mux { 119 function = "mmcsd"; 120 groups = "mmcsd_a_1", "mmcsd_b_1"; 121 }; 122 }; 123 mmcsd_default_mode: mmcsd_default { 124 mmcsd_default_cfg1 { 125 /* 126 * MCCLK, MCCMDDIR, MCDAT0DIR, MCDAT31DIR, MCDATDIR2 127 * MCCMD, MCDAT3-0, MCMSFBCLK 128 */ 129 pins = "GPIO8_B10", "GPIO9_A10", "GPIO10_C11", "GPIO11_B11", 130 "GPIO12_A11", "GPIO13_C12", "GPIO14_B12", "GPIO15_A12", 131 "GPIO16_C13", "GPIO23_D15", "GPIO24_C15"; 132 ste,output = <2>; 133 }; 134 }; 135 }; 136 i2c0 { 137 i2c0_default_mux: i2c0_mux { 138 i2c0_default_mux { 139 function = "i2c0"; 140 groups = "i2c0_a_1"; 141 }; 142 }; 143 i2c0_default_mode: i2c0_default { 144 i2c0_default_cfg { 145 pins = "GPIO62_D3", "GPIO63_D2"; 146 ste,input = <0>; 147 }; 148 }; 149 }; 150 i2c1 { 151 i2c1_default_mux: i2c1_mux { 152 i2c1_default_mux { 153 function = "i2c1"; 154 groups = "i2c1_a_1"; 155 }; 156 }; 157 i2c1_default_mode: i2c1_default { 158 i2c1_default_cfg { 159 pins = "GPIO53_L4", "GPIO54_L3"; 160 ste,input = <0>; 161 }; 162 }; 163 }; 164 }; 165 166 src: src@101e0000 { 167 compatible = "stericsson,nomadik-src"; 168 reg = <0x101e0000 0x1000>; 169 170 /* 171 * MXTAL "Main Chrystal" is a chrystal oscillator @19.2 MHz 172 * that is parent of TIMCLK, PLL1 and PLL2 173 */ 174 mxtal: mxtal@19.2M { 175 #clock-cells = <0>; 176 compatible = "fixed-clock"; 177 clock-frequency = <19200000>; 178 }; 179 180 /* 181 * The 2.4 MHz TIMCLK reference clock is active at 182 * boot time, this is actually the MXTALCLK @19.2 MHz 183 * divided by 8. This clock is used by the timers and 184 * watchdog. See page 105 ff. 185 */ 186 timclk: timclk@2.4M { 187 #clock-cells = <0>; 188 compatible = "fixed-factor-clock"; 189 clock-div = <8>; 190 clock-mult = <1>; 191 clocks = <&mxtal>; 192 }; 193 194 /* PLL1 is locked to MXTALI and variable from 20.4 to 334 MHz */ 195 pll1: pll1@0 { 196 #clock-cells = <0>; 197 compatible = "st,nomadik-pll-clock"; 198 pll-id = <1>; 199 clocks = <&mxtal>; 200 }; 201 202 /* HCLK divides the PLL1 with 1,2,3 or 4 */ 203 hclk: hclk@0 { 204 #clock-cells = <0>; 205 compatible = "st,nomadik-hclk-clock"; 206 clocks = <&pll1>; 207 }; 208 /* The PCLK domain uses HCLK right off */ 209 pclk: pclk@0 { 210 #clock-cells = <0>; 211 compatible = "fixed-factor-clock"; 212 clock-div = <1>; 213 clock-mult = <1>; 214 clocks = <&hclk>; 215 }; 216 217 /* PLL2 is usually 864 MHz and divided into a few fixed rates */ 218 pll2: pll2@0 { 219 #clock-cells = <0>; 220 compatible = "st,nomadik-pll-clock"; 221 pll-id = <2>; 222 clocks = <&mxtal>; 223 }; 224 clk216: clk216@216M { 225 #clock-cells = <0>; 226 compatible = "fixed-factor-clock"; 227 clock-div = <4>; 228 clock-mult = <1>; 229 clocks = <&pll2>; 230 }; 231 clk108: clk108@108M { 232 #clock-cells = <0>; 233 compatible = "fixed-factor-clock"; 234 clock-div = <2>; 235 clock-mult = <1>; 236 clocks = <&clk216>; 237 }; 238 clk72: clk72@72M { 239 #clock-cells = <0>; 240 compatible = "fixed-factor-clock"; 241 /* The data sheet does not say how this is derived */ 242 clock-div = <12>; 243 clock-mult = <1>; 244 clocks = <&pll2>; 245 }; 246 clk48: clk48@48M { 247 #clock-cells = <0>; 248 compatible = "fixed-factor-clock"; 249 /* The data sheet does not say how this is derived */ 250 clock-div = <18>; 251 clock-mult = <1>; 252 clocks = <&pll2>; 253 }; 254 clk27: clk27@27M { 255 #clock-cells = <0>; 256 compatible = "fixed-factor-clock"; 257 clock-div = <4>; 258 clock-mult = <1>; 259 clocks = <&clk108>; 260 }; 261 262 /* This apparently exists as well */ 263 ulpiclk: ulpiclk@60M { 264 #clock-cells = <0>; 265 compatible = "fixed-clock"; 266 clock-frequency = <60000000>; 267 }; 268 269 /* 270 * IP AMBA bus clocks, driving the bus side of the 271 * peripheral clocking, clock gates. 272 */ 273 274 hclkdma0: hclkdma0@48M { 275 #clock-cells = <0>; 276 compatible = "st,nomadik-src-clock"; 277 clock-id = <0>; 278 clocks = <&hclk>; 279 }; 280 hclksmc: hclksmc@48M { 281 #clock-cells = <0>; 282 compatible = "st,nomadik-src-clock"; 283 clock-id = <1>; 284 clocks = <&hclk>; 285 }; 286 hclksdram: hclksdram@48M { 287 #clock-cells = <0>; 288 compatible = "st,nomadik-src-clock"; 289 clock-id = <2>; 290 clocks = <&hclk>; 291 }; 292 hclkdma1: hclkdma1@48M { 293 #clock-cells = <0>; 294 compatible = "st,nomadik-src-clock"; 295 clock-id = <3>; 296 clocks = <&hclk>; 297 }; 298 hclkclcd: hclkclcd@48M { 299 #clock-cells = <0>; 300 compatible = "st,nomadik-src-clock"; 301 clock-id = <4>; 302 clocks = <&hclk>; 303 }; 304 pclkirda: pclkirda@48M { 305 #clock-cells = <0>; 306 compatible = "st,nomadik-src-clock"; 307 clock-id = <5>; 308 clocks = <&pclk>; 309 }; 310 pclkssp: pclkssp@48M { 311 #clock-cells = <0>; 312 compatible = "st,nomadik-src-clock"; 313 clock-id = <6>; 314 clocks = <&pclk>; 315 }; 316 pclkuart0: pclkuart0@48M { 317 #clock-cells = <0>; 318 compatible = "st,nomadik-src-clock"; 319 clock-id = <7>; 320 clocks = <&pclk>; 321 }; 322 pclksdi: pclksdi@48M { 323 #clock-cells = <0>; 324 compatible = "st,nomadik-src-clock"; 325 clock-id = <8>; 326 clocks = <&pclk>; 327 }; 328 pclki2c0: pclki2c0@48M { 329 #clock-cells = <0>; 330 compatible = "st,nomadik-src-clock"; 331 clock-id = <9>; 332 clocks = <&pclk>; 333 }; 334 pclki2c1: pclki2c1@48M { 335 #clock-cells = <0>; 336 compatible = "st,nomadik-src-clock"; 337 clock-id = <10>; 338 clocks = <&pclk>; 339 }; 340 pclkuart1: pclkuart1@48M { 341 #clock-cells = <0>; 342 compatible = "st,nomadik-src-clock"; 343 clock-id = <11>; 344 clocks = <&pclk>; 345 }; 346 pclkmsp0: pclkmsp0@48M { 347 #clock-cells = <0>; 348 compatible = "st,nomadik-src-clock"; 349 clock-id = <12>; 350 clocks = <&pclk>; 351 }; 352 hclkusb: hclkusb@48M { 353 #clock-cells = <0>; 354 compatible = "st,nomadik-src-clock"; 355 clock-id = <13>; 356 clocks = <&hclk>; 357 }; 358 hclkdif: hclkdif@48M { 359 #clock-cells = <0>; 360 compatible = "st,nomadik-src-clock"; 361 clock-id = <14>; 362 clocks = <&hclk>; 363 }; 364 hclksaa: hclksaa@48M { 365 #clock-cells = <0>; 366 compatible = "st,nomadik-src-clock"; 367 clock-id = <15>; 368 clocks = <&hclk>; 369 }; 370 hclksva: hclksva@48M { 371 #clock-cells = <0>; 372 compatible = "st,nomadik-src-clock"; 373 clock-id = <16>; 374 clocks = <&hclk>; 375 }; 376 pclkhsi: pclkhsi@48M { 377 #clock-cells = <0>; 378 compatible = "st,nomadik-src-clock"; 379 clock-id = <17>; 380 clocks = <&pclk>; 381 }; 382 pclkxti: pclkxti@48M { 383 #clock-cells = <0>; 384 compatible = "st,nomadik-src-clock"; 385 clock-id = <18>; 386 clocks = <&pclk>; 387 }; 388 pclkuart2: pclkuart2@48M { 389 #clock-cells = <0>; 390 compatible = "st,nomadik-src-clock"; 391 clock-id = <19>; 392 clocks = <&pclk>; 393 }; 394 pclkmsp1: pclkmsp1@48M { 395 #clock-cells = <0>; 396 compatible = "st,nomadik-src-clock"; 397 clock-id = <20>; 398 clocks = <&pclk>; 399 }; 400 pclkmsp2: pclkmsp2@48M { 401 #clock-cells = <0>; 402 compatible = "st,nomadik-src-clock"; 403 clock-id = <21>; 404 clocks = <&pclk>; 405 }; 406 pclkowm: pclkowm@48M { 407 #clock-cells = <0>; 408 compatible = "st,nomadik-src-clock"; 409 clock-id = <22>; 410 clocks = <&pclk>; 411 }; 412 hclkhpi: hclkhpi@48M { 413 #clock-cells = <0>; 414 compatible = "st,nomadik-src-clock"; 415 clock-id = <23>; 416 clocks = <&hclk>; 417 }; 418 pclkske: pclkske@48M { 419 #clock-cells = <0>; 420 compatible = "st,nomadik-src-clock"; 421 clock-id = <24>; 422 clocks = <&pclk>; 423 }; 424 pclkhsem: pclkhsem@48M { 425 #clock-cells = <0>; 426 compatible = "st,nomadik-src-clock"; 427 clock-id = <25>; 428 clocks = <&pclk>; 429 }; 430 hclk3d: hclk3d@48M { 431 #clock-cells = <0>; 432 compatible = "st,nomadik-src-clock"; 433 clock-id = <26>; 434 clocks = <&hclk>; 435 }; 436 hclkhash: hclkhash@48M { 437 #clock-cells = <0>; 438 compatible = "st,nomadik-src-clock"; 439 clock-id = <27>; 440 clocks = <&hclk>; 441 }; 442 hclkcryp: hclkcryp@48M { 443 #clock-cells = <0>; 444 compatible = "st,nomadik-src-clock"; 445 clock-id = <28>; 446 clocks = <&hclk>; 447 }; 448 pclkmshc: pclkmshc@48M { 449 #clock-cells = <0>; 450 compatible = "st,nomadik-src-clock"; 451 clock-id = <29>; 452 clocks = <&pclk>; 453 }; 454 hclkusbm: hclkusbm@48M { 455 #clock-cells = <0>; 456 compatible = "st,nomadik-src-clock"; 457 clock-id = <30>; 458 clocks = <&hclk>; 459 }; 460 hclkrng: hclkrng@48M { 461 #clock-cells = <0>; 462 compatible = "st,nomadik-src-clock"; 463 clock-id = <31>; 464 clocks = <&hclk>; 465 }; 466 467 /* IP kernel clocks */ 468 clcdclk: clcdclk@0 { 469 #clock-cells = <0>; 470 compatible = "st,nomadik-src-clock"; 471 clock-id = <36>; 472 clocks = <&clk72 &clk48>; 473 }; 474 irdaclk: irdaclk@48M { 475 #clock-cells = <0>; 476 compatible = "st,nomadik-src-clock"; 477 clock-id = <37>; 478 clocks = <&clk48>; 479 }; 480 sspiclk: sspiclk@48M { 481 #clock-cells = <0>; 482 compatible = "st,nomadik-src-clock"; 483 clock-id = <38>; 484 clocks = <&clk48>; 485 }; 486 uart0clk: uart0clk@48M { 487 #clock-cells = <0>; 488 compatible = "st,nomadik-src-clock"; 489 clock-id = <39>; 490 clocks = <&clk48>; 491 }; 492 sdiclk: sdiclk@48M { 493 /* Also called MCCLK in some documents */ 494 #clock-cells = <0>; 495 compatible = "st,nomadik-src-clock"; 496 clock-id = <40>; 497 clocks = <&clk48>; 498 }; 499 i2c0clk: i2c0clk@48M { 500 #clock-cells = <0>; 501 compatible = "st,nomadik-src-clock"; 502 clock-id = <41>; 503 clocks = <&clk48>; 504 }; 505 i2c1clk: i2c1clk@48M { 506 #clock-cells = <0>; 507 compatible = "st,nomadik-src-clock"; 508 clock-id = <42>; 509 clocks = <&clk48>; 510 }; 511 uart1clk: uart1clk@48M { 512 #clock-cells = <0>; 513 compatible = "st,nomadik-src-clock"; 514 clock-id = <43>; 515 clocks = <&clk48>; 516 }; 517 mspclk0: mspclk0@48M { 518 #clock-cells = <0>; 519 compatible = "st,nomadik-src-clock"; 520 clock-id = <44>; 521 clocks = <&clk48>; 522 }; 523 usbclk: usbclk@48M { 524 #clock-cells = <0>; 525 compatible = "st,nomadik-src-clock"; 526 clock-id = <45>; 527 clocks = <&clk48>; /* 48 MHz not ULPI */ 528 }; 529 difclk: difclk@72M { 530 #clock-cells = <0>; 531 compatible = "st,nomadik-src-clock"; 532 clock-id = <46>; 533 clocks = <&clk72>; 534 }; 535 ipi2cclk: ipi2cclk@48M { 536 #clock-cells = <0>; 537 compatible = "st,nomadik-src-clock"; 538 clock-id = <47>; 539 clocks = <&clk48>; /* Guess */ 540 }; 541 ipbmcclk: ipbmcclk@48M { 542 #clock-cells = <0>; 543 compatible = "st,nomadik-src-clock"; 544 clock-id = <48>; 545 clocks = <&clk48>; /* Guess */ 546 }; 547 hsiclkrx: hsiclkrx@216M { 548 #clock-cells = <0>; 549 compatible = "st,nomadik-src-clock"; 550 clock-id = <49>; 551 clocks = <&clk216>; 552 }; 553 hsiclktx: hsiclktx@108M { 554 #clock-cells = <0>; 555 compatible = "st,nomadik-src-clock"; 556 clock-id = <50>; 557 clocks = <&clk108>; 558 }; 559 uart2clk: uart2clk@48M { 560 #clock-cells = <0>; 561 compatible = "st,nomadik-src-clock"; 562 clock-id = <51>; 563 clocks = <&clk48>; 564 }; 565 mspclk1: mspclk1@48M { 566 #clock-cells = <0>; 567 compatible = "st,nomadik-src-clock"; 568 clock-id = <52>; 569 clocks = <&clk48>; 570 }; 571 mspclk2: mspclk2@48M { 572 #clock-cells = <0>; 573 compatible = "st,nomadik-src-clock"; 574 clock-id = <53>; 575 clocks = <&clk48>; 576 }; 577 owmclk: owmclk@48M { 578 #clock-cells = <0>; 579 compatible = "st,nomadik-src-clock"; 580 clock-id = <54>; 581 clocks = <&clk48>; /* Guess */ 582 }; 583 skeclk: skeclk@48M { 584 #clock-cells = <0>; 585 compatible = "st,nomadik-src-clock"; 586 clock-id = <56>; 587 clocks = <&clk48>; /* Guess */ 588 }; 589 x3dclk: x3dclk@48M { 590 #clock-cells = <0>; 591 compatible = "st,nomadik-src-clock"; 592 clock-id = <58>; 593 clocks = <&clk48>; /* Guess */ 594 }; 595 pclkmsp3: pclkmsp3@48M { 596 #clock-cells = <0>; 597 compatible = "st,nomadik-src-clock"; 598 clock-id = <59>; 599 clocks = <&pclk>; 600 }; 601 mspclk3: mspclk3@48M { 602 #clock-cells = <0>; 603 compatible = "st,nomadik-src-clock"; 604 clock-id = <60>; 605 clocks = <&clk48>; 606 }; 607 mshcclk: mshcclk@48M { 608 #clock-cells = <0>; 609 compatible = "st,nomadik-src-clock"; 610 clock-id = <61>; 611 clocks = <&clk48>; /* Guess */ 612 }; 613 usbmclk: usbmclk@48M { 614 #clock-cells = <0>; 615 compatible = "st,nomadik-src-clock"; 616 clock-id = <62>; 617 /* Stated as "48 MHz not ULPI clock" */ 618 clocks = <&clk48>; 619 }; 620 rngcclk: rngcclk@48M { 621 #clock-cells = <0>; 622 compatible = "st,nomadik-src-clock"; 623 clock-id = <63>; 624 clocks = <&clk48>; /* Guess */ 625 }; 626 }; 627 628 /* A NAND flash of 128 MiB */ 629 fsmc: flash@40000000 { 630 compatible = "stericsson,fsmc-nand"; 631 #address-cells = <1>; 632 #size-cells = <1>; 633 reg = <0x10100000 0x1000>, /* FSMC Register*/ 634 <0x40000000 0x2000>, /* NAND Base DATA */ 635 <0x41000000 0x2000>, /* NAND Base ADDR */ 636 <0x40800000 0x2000>; /* NAND Base CMD */ 637 reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd"; 638 clocks = <&hclksmc>; 639 status = "okay"; 640 timings = /bits/ 8 <0 0 0 0x10 0x0a 0>; 641 642 partition@0 { 643 label = "X-Loader(NAND)"; 644 reg = <0x0 0x40000>; 645 }; 646 partition@40000 { 647 label = "MemInit(NAND)"; 648 reg = <0x40000 0x40000>; 649 }; 650 partition@80000 { 651 label = "BootLoader(NAND)"; 652 reg = <0x80000 0x200000>; 653 }; 654 partition@280000 { 655 label = "Kernel zImage(NAND)"; 656 reg = <0x280000 0x300000>; 657 }; 658 partition@580000 { 659 label = "Root Filesystem(NAND)"; 660 reg = <0x580000 0x1600000>; 661 }; 662 partition@1b80000 { 663 label = "User Filesystem(NAND)"; 664 reg = <0x1b80000 0x6480000>; 665 }; 666 }; 667 668 /* I2C0 connected to the STw4811 power management chip */ 669 i2c0 { 670 compatible = "st,nomadik-i2c", "arm,primecell"; 671 reg = <0x101f8000 0x1000>; 672 interrupt-parent = <&vica>; 673 interrupts = <20>; 674 clock-frequency = <100000>; 675 #address-cells = <1>; 676 #size-cells = <0>; 677 clocks = <&i2c0clk>, <&pclki2c0>; 678 clock-names = "mclk", "apb_pclk"; 679 pinctrl-names = "default"; 680 pinctrl-0 = <&i2c0_default_mux>, <&i2c0_default_mode>; 681 682 stw4811@2d { 683 compatible = "st,stw4811"; 684 reg = <0x2d>; 685 vmmc_regulator: vmmc { 686 compatible = "st,stw481x-vmmc"; 687 regulator-name = "VMMC"; 688 regulator-min-microvolt = <1800000>; 689 regulator-max-microvolt = <3300000>; 690 }; 691 }; 692 }; 693 694 /* I2C1 connected to various sensors */ 695 i2c1 { 696 compatible = "st,nomadik-i2c", "arm,primecell"; 697 reg = <0x101f7000 0x1000>; 698 interrupt-parent = <&vica>; 699 interrupts = <21>; 700 clock-frequency = <100000>; 701 #address-cells = <1>; 702 #size-cells = <0>; 703 clocks = <&i2c1clk>, <&pclki2c1>; 704 clock-names = "mclk", "apb_pclk"; 705 pinctrl-names = "default"; 706 pinctrl-0 = <&i2c1_default_mux>, <&i2c1_default_mode>; 707 708 camera@2d { 709 compatible = "st,camera"; 710 reg = <0x10>; 711 }; 712 stw5095@1a { 713 compatible = "st,stw5095"; 714 reg = <0x1a>; 715 }; 716 lis3lv02dl@1d { 717 compatible = "st,lis3lv02dl"; 718 reg = <0x1d>; 719 }; 720 }; 721 722 amba { 723 compatible = "arm,amba-bus"; 724 #address-cells = <1>; 725 #size-cells = <1>; 726 ranges; 727 728 vica: intc@10140000 { 729 compatible = "arm,versatile-vic"; 730 interrupt-controller; 731 #interrupt-cells = <1>; 732 reg = <0x10140000 0x20>; 733 }; 734 735 vicb: intc@10140020 { 736 compatible = "arm,versatile-vic"; 737 interrupt-controller; 738 #interrupt-cells = <1>; 739 reg = <0x10140020 0x20>; 740 }; 741 742 uart0: uart@101fd000 { 743 compatible = "arm,pl011", "arm,primecell"; 744 reg = <0x101fd000 0x1000>; 745 interrupt-parent = <&vica>; 746 interrupts = <12>; 747 clocks = <&uart0clk>, <&pclkuart0>; 748 clock-names = "uartclk", "apb_pclk"; 749 pinctrl-names = "default"; 750 pinctrl-0 = <&uart0_default_mux>; 751 }; 752 753 uart1: uart@101fb000 { 754 compatible = "arm,pl011", "arm,primecell"; 755 reg = <0x101fb000 0x1000>; 756 interrupt-parent = <&vica>; 757 interrupts = <17>; 758 clocks = <&uart1clk>, <&pclkuart1>; 759 clock-names = "uartclk", "apb_pclk"; 760 pinctrl-names = "default"; 761 pinctrl-0 = <&uart1_default_mux>; 762 }; 763 764 uart2: uart@101f2000 { 765 compatible = "arm,pl011", "arm,primecell"; 766 reg = <0x101f2000 0x1000>; 767 interrupt-parent = <&vica>; 768 interrupts = <28>; 769 clocks = <&uart2clk>, <&pclkuart2>; 770 clock-names = "uartclk", "apb_pclk"; 771 status = "disabled"; 772 }; 773 774 rng: rng@101b0000 { 775 compatible = "arm,primecell"; 776 reg = <0x101b0000 0x1000>; 777 clocks = <&rngcclk>, <&hclkrng>; 778 clock-names = "rng", "apb_pclk"; 779 }; 780 781 rtc: rtc@101e8000 { 782 compatible = "arm,pl031", "arm,primecell"; 783 reg = <0x101e8000 0x1000>; 784 clocks = <&pclk>; 785 clock-names = "apb_pclk"; 786 interrupt-parent = <&vica>; 787 interrupts = <10>; 788 }; 789 790 mmcsd: sdi@101f6000 { 791 compatible = "arm,pl18x", "arm,primecell"; 792 reg = <0x101f6000 0x1000>; 793 clocks = <&sdiclk>, <&pclksdi>; 794 clock-names = "mclk", "apb_pclk"; 795 interrupt-parent = <&vica>; 796 interrupts = <22>; 797 max-frequency = <400000>; 798 bus-width = <4>; 799 cap-mmc-highspeed; 800 cap-sd-highspeed; 801 full-pwr-cycle; 802 /* 803 * The STw4811 circuit used with the Nomadik strictly 804 * requires that all of these signal direction pins be 805 * routed and used for its 4-bit levelshifter. 806 */ 807 st,sig-dir-dat0; 808 st,sig-dir-dat2; 809 st,sig-dir-dat31; 810 st,sig-dir-cmd; 811 st,sig-pin-fbclk; 812 pinctrl-names = "default"; 813 pinctrl-0 = <&mmcsd_default_mux>, <&mmcsd_default_mode>; 814 vmmc-supply = <&vmmc_regulator>; 815 }; 816 }; 817}; 818