1/*
2 * Copyright 2012 ST-Ericsson
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11#include "ste-nomadik-pinctrl.dtsi"
12
13/ {
14	soc {
15		pinctrl {
16			uart0 {
17				uart0_default_mux: uart0_mux {
18					default_mux {
19						function = "u0";
20						groups = "u0_a_1";
21					};
22				};
23
24				uart0_default_mode: uart0_default {
25					default_cfg1 {
26						pins = "GPIO0", "GPIO2";
27						ste,config = <&in_pu>;
28					};
29
30					default_cfg2 {
31						pins = "GPIO1", "GPIO3";
32						ste,config = <&out_hi>;
33					};
34				};
35
36				uart0_sleep_mode: uart0_sleep {
37					sleep_cfg1 {
38						pins = "GPIO0", "GPIO2";
39						ste,config = <&slpm_in_pu>;
40					};
41
42					sleep_cfg2 {
43						pins = "GPIO1", "GPIO3";
44						ste,config = <&slpm_out_hi>;
45					};
46				};
47			};
48
49			uart2 {
50				uart2_default_mode: uart2_default {
51					default_mux {
52						function = "u2";
53						groups = "u2txrx_a_1";
54					};
55
56					default_cfg1 {
57						pins = "GPIO120";
58						ste,config = <&in_pu>;
59					};
60
61					default_cfg2 {
62						pins = "GPIO121";
63						ste,config = <&out_hi>;
64					};
65				};
66
67				uart2_sleep_mode: uart2_sleep {
68					sleep_cfg1 {
69						pins = "GPIO120";
70						ste,config = <&slpm_in_pu>;
71					};
72
73					sleep_cfg2 {
74						pins = "GPIO121";
75						ste,config = <&slpm_out_hi>;
76					};
77				};
78			};
79
80			i2c0 {
81				i2c0_default_mux: i2c_mux {
82					default_mux {
83						function = "i2c0";
84						groups = "i2c0_a_1";
85					};
86				};
87
88				i2c0_default_mode: i2c_default {
89					default_cfg1 {
90						pins = "GPIO147", "GPIO148";
91						ste,config = <&in_pu>;
92					};
93				};
94
95				i2c0_sleep_mode: i2c_sleep {
96					sleep_cfg1 {
97						pins = "GPIO147", "GPIO148";
98						ste,config = <&slpm_in_pu>;
99					};
100				};
101			};
102
103			i2c1 {
104				i2c1_default_mux: i2c_mux {
105					default_mux {
106						function = "i2c1";
107						groups = "i2c1_b_2";
108					};
109				};
110
111				i2c1_default_mode: i2c_default {
112					default_cfg1 {
113						pins = "GPIO16", "GPIO17";
114						ste,config = <&in_pu>;
115					};
116				};
117
118				i2c1_sleep_mode: i2c_sleep {
119					sleep_cfg1 {
120						pins = "GPIO16", "GPIO17";
121						ste,config = <&slpm_in_pu>;
122					};
123				};
124			};
125
126			i2c2 {
127				i2c2_default_mux: i2c_mux {
128					default_mux {
129						function = "i2c2";
130						groups = "i2c2_b_2";
131					};
132				};
133
134				i2c2_default_mode: i2c_default {
135					default_cfg1 {
136						pins = "GPIO10", "GPIO11";
137						ste,config = <&in_pu>;
138					};
139				};
140
141				i2c2_sleep_mode: i2c_sleep {
142					sleep_cfg1 {
143						pins = "GPIO11", "GPIO11";
144						ste,config = <&slpm_in_pu>;
145					};
146				};
147			};
148
149			i2c4 {
150				i2c4_default_mux: i2c_mux {
151					default_mux {
152						function = "i2c4";
153						groups = "i2c4_b_2";
154					};
155				};
156
157				i2c4_default_mode: i2c_default {
158					default_cfg1 {
159						pins = "GPIO122", "GPIO123";
160						ste,config = <&in_pu>;
161					};
162				};
163
164				i2c4_sleep_mode: i2c_sleep {
165					sleep_cfg1 {
166						pins = "GPIO122", "GPIO123";
167						ste,config = <&slpm_in_pu>;
168					};
169				};
170			};
171
172			i2c5 {
173				i2c5_default_mux: i2c_mux {
174					default_mux {
175						function = "i2c5";
176						groups = "i2c5_c_2";
177					};
178				};
179
180				i2c5_default_mode: i2c_default {
181					default_cfg1 {
182						pins = "GPIO118", "GPIO119";
183						ste,config = <&in_pu>;
184					};
185				};
186
187				i2c5_sleep_mode: i2c_sleep {
188					sleep_cfg1 {
189						pins = "GPIO118", "GPIO119";
190						ste,config = <&slpm_in_pu>;
191					};
192				};
193			};
194		};
195	};
196};
197