1#include "qcom-ipq8064-v1.0.dtsi"
2
3/ {
4	model = "Qualcomm IPQ8064/AP148";
5	compatible = "qcom,ipq8064-ap148", "qcom,ipq8064";
6
7	reserved-memory {
8		#address-cells = <1>;
9		#size-cells = <1>;
10		ranges;
11		rsvd@41200000 {
12			reg = <0x41200000 0x300000>;
13			no-map;
14		};
15	};
16
17	soc {
18		pinmux@800000 {
19			i2c4_pins: i2c4_pinmux {
20				pins = "gpio12", "gpio13";
21				function = "gsbi4";
22				bias-disable;
23			};
24
25			spi_pins: spi_pins {
26				mux {
27					pins = "gpio18", "gpio19", "gpio21";
28					function = "gsbi5";
29					drive-strength = <10>;
30					bias-none;
31				};
32			};
33		};
34
35		gsbi@16300000 {
36			qcom,mode = <GSBI_PROT_I2C_UART>;
37			status = "ok";
38			serial@16340000 {
39				status = "ok";
40			};
41
42			i2c4: i2c@16380000 {
43				status = "ok";
44
45				clock-frequency = <200000>;
46
47				pinctrl-0 = <&i2c4_pins>;
48				pinctrl-names = "default";
49			};
50		};
51
52		gsbi5: gsbi@1a200000 {
53			qcom,mode = <GSBI_PROT_SPI>;
54			status = "ok";
55
56			spi4: spi@1a280000 {
57				status = "ok";
58				spi-max-frequency = <50000000>;
59
60				pinctrl-0 = <&spi_pins>;
61				pinctrl-names = "default";
62
63				cs-gpios = <&qcom_pinmux 20 0>;
64
65				flash: m25p80@0 {
66					compatible = "s25fl256s1";
67					#address-cells = <1>;
68					#size-cells = <1>;
69					spi-max-frequency = <50000000>;
70					reg = <0>;
71
72					partition@0 {
73						label = "rootfs";
74						reg = <0x0 0x1000000>;
75					};
76
77					partition@1 {
78						label = "scratch";
79						reg = <0x1000000 0x1000000>;
80					};
81				};
82			};
83		};
84
85		sata-phy@1b400000 {
86			status = "ok";
87		};
88
89		sata@29000000 {
90			status = "ok";
91		};
92	};
93};
94