1/* 2 * Device Tree Source for IGEPv2 Rev. C (TI OMAP AM/DM37x) 3 * 4 * Copyright (C) 2012 Javier Martinez Canillas <javier@collabora.co.uk> 5 * Copyright (C) 2012 Enric Balletbo i Serra <eballetbo@gmail.com> 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License version 2 as 9 * published by the Free Software Foundation. 10 */ 11 12#include "omap3-igep0020-common.dtsi" 13 14/ { 15 model = "IGEPv2 Rev. C (TI OMAP AM/DM37x)"; 16 compatible = "isee,omap3-igep0020", "ti,omap36xx", "ti,omap3"; 17 18 /* Regulator to trigger the WIFI_PDN signal of the Wifi module */ 19 lbee1usjyc_pdn: lbee1usjyc_pdn { 20 compatible = "regulator-fixed"; 21 regulator-name = "regulator-lbee1usjyc-pdn"; 22 regulator-min-microvolt = <3300000>; 23 regulator-max-microvolt = <3300000>; 24 gpio = <&gpio5 10 GPIO_ACTIVE_HIGH>; /* gpio_138 - WIFI_PDN */ 25 startup-delay-us = <10000>; 26 enable-active-high; 27 }; 28 29 /* Regulator to trigger the RESET_N_W signal of the Wifi module */ 30 lbee1usjyc_reset_n_w: lbee1usjyc_reset_n_w { 31 compatible = "regulator-fixed"; 32 regulator-name = "regulator-lbee1usjyc-reset-n-w"; 33 regulator-min-microvolt = <3300000>; 34 regulator-max-microvolt = <3300000>; 35 gpio = <&gpio5 11 GPIO_ACTIVE_HIGH>; /* gpio_139 - RESET_N_W */ 36 enable-active-high; 37 }; 38}; 39 40&omap3_pmx_core { 41 lbee1usjyc_pins: pinmux_lbee1usjyc_pins { 42 pinctrl-single,pins = < 43 OMAP3_CORE1_IOPAD(0x2166, PIN_OUTPUT | MUX_MODE4) /* sdmmc2_dat5.gpio_137 - RESET_N_W */ 44 OMAP3_CORE1_IOPAD(0x2168, PIN_OUTPUT | MUX_MODE4) /* sdmmc2_dat6.gpio_138 - WIFI_PDN */ 45 OMAP3_CORE1_IOPAD(0x216a, PIN_OUTPUT | MUX_MODE4) /* sdmmc2_dat7.gpio_139 - RST_N_B */ 46 >; 47 }; 48 49 uart2_pins: pinmux_uart2_pins { 50 pinctrl-single,pins = < 51 OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT | MUX_MODE0) /* uart2_cts.uart2_cts */ 52 OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE0) /* uart2_rts .uart2_rts*/ 53 OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0) /* uart2_tx.uart2_tx */ 54 OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0) /* uart2_rx.uart2_rx */ 55 >; 56 }; 57}; 58 59/* On board Wifi module */ 60&mmc2 { 61 pinctrl-names = "default"; 62 pinctrl-0 = <&mmc2_pins &lbee1usjyc_pins>; 63 vmmc-supply = <&lbee1usjyc_pdn>; 64 vmmc_aux-supply = <&lbee1usjyc_reset_n_w>; 65 bus-width = <4>; 66 non-removable; 67}; 68