1/*
2 * Copyright (C) 2014 Freescale Semiconductor, Inc.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9/dts-v1/;
10
11#include <dt-bindings/gpio/gpio.h>
12#include <dt-bindings/input/input.h>
13#include "imx6sx.dtsi"
14
15/ {
16	model = "Freescale i.MX6 SoloX SDB Board";
17	compatible = "fsl,imx6sx-sdb", "fsl,imx6sx";
18
19	chosen {
20		stdout-path = &uart1;
21	};
22
23	memory {
24		reg = <0x80000000 0x40000000>;
25	};
26
27	backlight {
28		compatible = "pwm-backlight";
29		pwms = <&pwm3 0 5000000>;
30		brightness-levels = <0 4 8 16 32 64 128 255>;
31		default-brightness-level = <6>;
32	};
33
34	gpio-keys {
35		compatible = "gpio-keys";
36		pinctrl-names = "default";
37		pinctrl-0 = <&pinctrl_gpio_keys>;
38
39		volume-up {
40			label = "Volume Up";
41			gpios = <&gpio1 18 GPIO_ACTIVE_LOW>;
42			linux,code = <KEY_VOLUMEUP>;
43		};
44
45		volume-down {
46			label = "Volume Down";
47			gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
48			linux,code = <KEY_VOLUMEDOWN>;
49		};
50	};
51
52	regulators {
53		compatible = "simple-bus";
54		#address-cells = <1>;
55		#size-cells = <0>;
56
57		vcc_sd3: regulator@0 {
58			compatible = "regulator-fixed";
59			reg = <0>;
60			pinctrl-names = "default";
61			pinctrl-0 = <&pinctrl_vcc_sd3>;
62			regulator-name = "VCC_SD3";
63			regulator-min-microvolt = <3000000>;
64			regulator-max-microvolt = <3000000>;
65			gpio = <&gpio2 11 GPIO_ACTIVE_HIGH>;
66			enable-active-high;
67		};
68
69		reg_usb_otg1_vbus: regulator@1 {
70			compatible = "regulator-fixed";
71			reg = <1>;
72			pinctrl-names = "default";
73			pinctrl-0 = <&pinctrl_usb_otg1>;
74			regulator-name = "usb_otg1_vbus";
75			regulator-min-microvolt = <5000000>;
76			regulator-max-microvolt = <5000000>;
77			gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>;
78			enable-active-high;
79		};
80
81		reg_usb_otg2_vbus: regulator@2 {
82			compatible = "regulator-fixed";
83			reg = <2>;
84			pinctrl-names = "default";
85			pinctrl-0 = <&pinctrl_usb_otg2>;
86			regulator-name = "usb_otg2_vbus";
87			regulator-min-microvolt = <5000000>;
88			regulator-max-microvolt = <5000000>;
89			gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
90			enable-active-high;
91		};
92
93		reg_psu_5v: regulator@3 {
94			compatible = "regulator-fixed";
95			reg = <3>;
96			regulator-name = "PSU-5V0";
97			regulator-min-microvolt = <5000000>;
98			regulator-max-microvolt = <5000000>;
99		};
100
101		reg_lcd_3v3: regulator@4 {
102			compatible = "regulator-fixed";
103			reg = <4>;
104			regulator-name = "lcd-3v3";
105			gpio = <&gpio3 27 0>;
106			enable-active-high;
107		};
108
109		reg_peri_3v3: regulator@5 {
110			compatible = "regulator-fixed";
111			reg = <5>;
112			pinctrl-names = "default";
113			pinctrl-0 = <&pinctrl_peri_3v3>;
114			regulator-name = "peri_3v3";
115			regulator-min-microvolt = <3300000>;
116			regulator-max-microvolt = <3300000>;
117			gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>;
118			enable-active-high;
119			regulator-always-on;
120		};
121
122		reg_enet_3v3: regulator@6 {
123			compatible = "regulator-fixed";
124			reg = <6>;
125			pinctrl-names = "default";
126			pinctrl-0 = <&pinctrl_enet_3v3>;
127			regulator-name = "enet_3v3";
128			regulator-min-microvolt = <3300000>;
129			regulator-max-microvolt = <3300000>;
130			gpios = <&gpio2 6 GPIO_ACTIVE_LOW>;
131		};
132	};
133
134	sound {
135		compatible = "fsl,imx6sx-sdb-wm8962", "fsl,imx-audio-wm8962";
136		model = "wm8962-audio";
137		ssi-controller = <&ssi2>;
138		audio-codec = <&codec>;
139		audio-routing =
140			"Headphone Jack", "HPOUTL",
141			"Headphone Jack", "HPOUTR",
142			"Ext Spk", "SPKOUTL",
143			"Ext Spk", "SPKOUTR",
144			"AMIC", "MICBIAS",
145			"IN3R", "AMIC";
146		mux-int-port = <2>;
147		mux-ext-port = <6>;
148	};
149};
150
151&audmux {
152	pinctrl-names = "default";
153	pinctrl-0 = <&pinctrl_audmux>;
154	status = "okay";
155};
156
157&fec1 {
158	pinctrl-names = "default";
159	pinctrl-0 = <&pinctrl_enet1>;
160	phy-supply = <&reg_enet_3v3>;
161	phy-mode = "rgmii";
162	phy-handle = <&ethphy1>;
163	status = "okay";
164
165	mdio {
166		#address-cells = <1>;
167		#size-cells = <0>;
168
169		ethphy1: ethernet-phy@1 {
170			reg = <1>;
171		};
172
173		ethphy2: ethernet-phy@2 {
174			reg = <2>;
175		};
176	};
177};
178
179&fec2 {
180	pinctrl-names = "default";
181	pinctrl-0 = <&pinctrl_enet2>;
182	phy-mode = "rgmii";
183	phy-handle = <&ethphy2>;
184	status = "okay";
185};
186
187&i2c4 {
188        clock-frequency = <100000>;
189        pinctrl-names = "default";
190        pinctrl-0 = <&pinctrl_i2c4>;
191        status = "okay";
192
193	codec: wm8962@1a {
194		compatible = "wlf,wm8962";
195		reg = <0x1a>;
196		clocks = <&clks IMX6SX_CLK_AUDIO>;
197		DCVDD-supply = <&vgen4_reg>;
198		DBVDD-supply = <&vgen4_reg>;
199		AVDD-supply = <&vgen4_reg>;
200		CPVDD-supply = <&vgen4_reg>;
201		MICVDD-supply = <&vgen3_reg>;
202		PLLVDD-supply = <&vgen4_reg>;
203		SPKVDD1-supply = <&reg_psu_5v>;
204		SPKVDD2-supply = <&reg_psu_5v>;
205	};
206};
207
208&lcdif1 {
209	pinctrl-names = "default";
210	pinctrl-0 = <&pinctrl_lcd>;
211	lcd-supply = <&reg_lcd_3v3>;
212	display = <&display0>;
213	status = "okay";
214
215	display0: display0 {
216		bits-per-pixel = <16>;
217		bus-width = <24>;
218
219		display-timings {
220			native-mode = <&timing0>;
221			timing0: timing0 {
222				clock-frequency = <33500000>;
223				hactive = <800>;
224				vactive = <480>;
225				hback-porch = <89>;
226				hfront-porch = <164>;
227				vback-porch = <23>;
228				vfront-porch = <10>;
229				hsync-len = <10>;
230				vsync-len = <10>;
231				hsync-active = <0>;
232				vsync-active = <0>;
233				de-active = <1>;
234				pixelclk-active = <0>;
235			};
236		};
237	};
238};
239
240&pwm3 {
241	pinctrl-names = "default";
242	pinctrl-0 = <&pinctrl_pwm3>;
243	status = "okay";
244};
245
246&snvs_poweroff {
247	status = "okay";
248};
249
250&ssi2 {
251	status = "okay";
252};
253
254&uart1 {
255	pinctrl-names = "default";
256	pinctrl-0 = <&pinctrl_uart1>;
257	status = "okay";
258};
259
260&uart5 { /* for bluetooth */
261	pinctrl-names = "default";
262	pinctrl-0 = <&pinctrl_uart5>;
263	fsl,uart-has-rtscts;
264	status = "okay";
265};
266
267&usbotg1 {
268	vbus-supply = <&reg_usb_otg1_vbus>;
269	pinctrl-names = "default";
270	pinctrl-0 = <&pinctrl_usb_otg1_id>;
271	status = "okay";
272};
273
274&usbotg2 {
275	vbus-supply = <&reg_usb_otg2_vbus>;
276	dr_mode = "host";
277	status = "okay";
278};
279
280&usdhc2 {
281	pinctrl-names = "default";
282	pinctrl-0 = <&pinctrl_usdhc2>;
283	non-removable;
284	no-1-8-v;
285	keep-power-in-suspend;
286	enable-sdio-wakeup;
287	status = "okay";
288};
289
290&usdhc3 {
291	pinctrl-names = "default", "state_100mhz", "state_200mhz";
292	pinctrl-0 = <&pinctrl_usdhc3>;
293	pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
294	pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
295	bus-width = <8>;
296	cd-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
297	wp-gpios = <&gpio2 15 GPIO_ACTIVE_HIGH>;
298	keep-power-in-suspend;
299	enable-sdio-wakeup;
300	vmmc-supply = <&vcc_sd3>;
301	status = "okay";
302};
303
304&usdhc4 {
305	pinctrl-names = "default";
306	pinctrl-0 = <&pinctrl_usdhc4>;
307	cd-gpios = <&gpio6 21 GPIO_ACTIVE_LOW>;
308	wp-gpios = <&gpio6 20 GPIO_ACTIVE_HIGH>;
309	status = "okay";
310};
311
312&iomuxc {
313	imx6x-sdb {
314		pinctrl_audmux: audmuxgrp {
315			fsl,pins = <
316				MX6SX_PAD_CSI_DATA00__AUDMUX_AUD6_TXC	0x130b0
317				MX6SX_PAD_CSI_DATA01__AUDMUX_AUD6_TXFS	0x130b0
318				MX6SX_PAD_CSI_HSYNC__AUDMUX_AUD6_TXD	0x120b0
319				MX6SX_PAD_CSI_VSYNC__AUDMUX_AUD6_RXD	0x130b0
320				MX6SX_PAD_CSI_PIXCLK__AUDMUX_MCLK	0x130b0
321			>;
322		};
323
324		pinctrl_enet1: enet1grp {
325			fsl,pins = <
326				MX6SX_PAD_ENET1_MDIO__ENET1_MDIO	0xa0b1
327				MX6SX_PAD_ENET1_MDC__ENET1_MDC		0xa0b1
328				MX6SX_PAD_RGMII1_TXC__ENET1_RGMII_TXC	0xa0b1
329				MX6SX_PAD_RGMII1_TD0__ENET1_TX_DATA_0	0xa0b1
330				MX6SX_PAD_RGMII1_TD1__ENET1_TX_DATA_1	0xa0b1
331				MX6SX_PAD_RGMII1_TD2__ENET1_TX_DATA_2	0xa0b1
332				MX6SX_PAD_RGMII1_TD3__ENET1_TX_DATA_3	0xa0b1
333				MX6SX_PAD_RGMII1_TX_CTL__ENET1_TX_EN	0xa0b1
334				MX6SX_PAD_RGMII1_RXC__ENET1_RX_CLK	0x3081
335				MX6SX_PAD_RGMII1_RD0__ENET1_RX_DATA_0	0x3081
336				MX6SX_PAD_RGMII1_RD1__ENET1_RX_DATA_1	0x3081
337				MX6SX_PAD_RGMII1_RD2__ENET1_RX_DATA_2	0x3081
338				MX6SX_PAD_RGMII1_RD3__ENET1_RX_DATA_3	0x3081
339				MX6SX_PAD_RGMII1_RX_CTL__ENET1_RX_EN	0x3081
340				MX6SX_PAD_ENET2_RX_CLK__ENET2_REF_CLK_25M	0x91
341			>;
342		};
343
344		pinctrl_enet_3v3: enet3v3grp {
345			fsl,pins = <
346				MX6SX_PAD_ENET2_COL__GPIO2_IO_6		0x80000000
347			>;
348		};
349
350		pinctrl_enet2: enet2grp {
351			fsl,pins = <
352				MX6SX_PAD_RGMII2_TXC__ENET2_RGMII_TXC	0xa0b9
353				MX6SX_PAD_RGMII2_TD0__ENET2_TX_DATA_0	0xa0b1
354				MX6SX_PAD_RGMII2_TD1__ENET2_TX_DATA_1	0xa0b1
355				MX6SX_PAD_RGMII2_TD2__ENET2_TX_DATA_2	0xa0b1
356				MX6SX_PAD_RGMII2_TD3__ENET2_TX_DATA_3	0xa0b1
357				MX6SX_PAD_RGMII2_TX_CTL__ENET2_TX_EN	0xa0b1
358				MX6SX_PAD_RGMII2_RXC__ENET2_RX_CLK	0x3081
359				MX6SX_PAD_RGMII2_RD0__ENET2_RX_DATA_0	0x3081
360				MX6SX_PAD_RGMII2_RD1__ENET2_RX_DATA_1	0x3081
361				MX6SX_PAD_RGMII2_RD2__ENET2_RX_DATA_2	0x3081
362				MX6SX_PAD_RGMII2_RD3__ENET2_RX_DATA_3	0x3081
363				MX6SX_PAD_RGMII2_RX_CTL__ENET2_RX_EN	0x3081
364			>;
365		};
366
367		pinctrl_gpio_keys: gpio_keysgrp {
368			fsl,pins = <
369				MX6SX_PAD_CSI_DATA04__GPIO1_IO_18 0x17059
370				MX6SX_PAD_CSI_DATA05__GPIO1_IO_19 0x17059
371			>;
372		};
373
374		pinctrl_i2c1: i2c1grp {
375			fsl,pins = <
376				MX6SX_PAD_GPIO1_IO01__I2C1_SDA		0x4001b8b1
377				MX6SX_PAD_GPIO1_IO00__I2C1_SCL		0x4001b8b1
378			>;
379		};
380
381		pinctrl_i2c4: i2c4grp {
382			fsl,pins = <
383				MX6SX_PAD_CSI_DATA07__I2C4_SDA		0x4001b8b1
384				MX6SX_PAD_CSI_DATA06__I2C4_SCL		0x4001b8b1
385			>;
386		};
387
388		pinctrl_lcd: lcdgrp {
389			fsl,pins = <
390				MX6SX_PAD_LCD1_DATA00__LCDIF1_DATA_0 0x4001b0b0
391				MX6SX_PAD_LCD1_DATA01__LCDIF1_DATA_1 0x4001b0b0
392				MX6SX_PAD_LCD1_DATA02__LCDIF1_DATA_2 0x4001b0b0
393				MX6SX_PAD_LCD1_DATA03__LCDIF1_DATA_3 0x4001b0b0
394				MX6SX_PAD_LCD1_DATA04__LCDIF1_DATA_4 0x4001b0b0
395				MX6SX_PAD_LCD1_DATA05__LCDIF1_DATA_5 0x4001b0b0
396				MX6SX_PAD_LCD1_DATA06__LCDIF1_DATA_6 0x4001b0b0
397				MX6SX_PAD_LCD1_DATA07__LCDIF1_DATA_7 0x4001b0b0
398				MX6SX_PAD_LCD1_DATA08__LCDIF1_DATA_8 0x4001b0b0
399				MX6SX_PAD_LCD1_DATA09__LCDIF1_DATA_9 0x4001b0b0
400				MX6SX_PAD_LCD1_DATA10__LCDIF1_DATA_10 0x4001b0b0
401				MX6SX_PAD_LCD1_DATA11__LCDIF1_DATA_11 0x4001b0b0
402				MX6SX_PAD_LCD1_DATA12__LCDIF1_DATA_12 0x4001b0b0
403				MX6SX_PAD_LCD1_DATA13__LCDIF1_DATA_13 0x4001b0b0
404				MX6SX_PAD_LCD1_DATA14__LCDIF1_DATA_14 0x4001b0b0
405				MX6SX_PAD_LCD1_DATA15__LCDIF1_DATA_15 0x4001b0b0
406				MX6SX_PAD_LCD1_DATA16__LCDIF1_DATA_16 0x4001b0b0
407				MX6SX_PAD_LCD1_DATA17__LCDIF1_DATA_17 0x4001b0b0
408				MX6SX_PAD_LCD1_DATA18__LCDIF1_DATA_18 0x4001b0b0
409				MX6SX_PAD_LCD1_DATA19__LCDIF1_DATA_19 0x4001b0b0
410				MX6SX_PAD_LCD1_DATA20__LCDIF1_DATA_20 0x4001b0b0
411				MX6SX_PAD_LCD1_DATA21__LCDIF1_DATA_21 0x4001b0b0
412				MX6SX_PAD_LCD1_DATA22__LCDIF1_DATA_22 0x4001b0b0
413				MX6SX_PAD_LCD1_DATA23__LCDIF1_DATA_23 0x4001b0b0
414				MX6SX_PAD_LCD1_CLK__LCDIF1_CLK	0x4001b0b0
415				MX6SX_PAD_LCD1_ENABLE__LCDIF1_ENABLE 0x4001b0b0
416				MX6SX_PAD_LCD1_VSYNC__LCDIF1_VSYNC 0x4001b0b0
417				MX6SX_PAD_LCD1_HSYNC__LCDIF1_HSYNC 0x4001b0b0
418				MX6SX_PAD_LCD1_RESET__GPIO3_IO_27 0x4001b0b0
419			>;
420		};
421
422		pinctrl_peri_3v3: peri3v3grp {
423			fsl,pins = <
424				MX6SX_PAD_QSPI1A_DATA0__GPIO4_IO_16	0x80000000
425			>;
426		};
427
428		pinctrl_pwm3: pwm3grp-1 {
429			fsl,pins = <
430				MX6SX_PAD_SD1_DATA2__PWM3_OUT 0x110b0
431			>;
432		};
433
434		pinctrl_qspi2: qspi2grp {
435			fsl,pins = <
436				MX6SX_PAD_NAND_WP_B__QSPI2_A_DATA_0     0x70f1
437				MX6SX_PAD_NAND_READY_B__QSPI2_A_DATA_1  0x70f1
438				MX6SX_PAD_NAND_CE0_B__QSPI2_A_DATA_2    0x70f1
439				MX6SX_PAD_NAND_CE1_B__QSPI2_A_DATA_3    0x70f1
440				MX6SX_PAD_NAND_CLE__QSPI2_A_SCLK        0x70f1
441				MX6SX_PAD_NAND_ALE__QSPI2_A_SS0_B       0x70f1
442				MX6SX_PAD_NAND_DATA01__QSPI2_B_DATA_0   0x70f1
443				MX6SX_PAD_NAND_DATA00__QSPI2_B_DATA_1   0x70f1
444				MX6SX_PAD_NAND_WE_B__QSPI2_B_DATA_2     0x70f1
445				MX6SX_PAD_NAND_RE_B__QSPI2_B_DATA_3     0x70f1
446				MX6SX_PAD_NAND_DATA02__QSPI2_B_SCLK     0x70f1
447				MX6SX_PAD_NAND_DATA03__QSPI2_B_SS0_B    0x70f1
448			>;
449		};
450
451		pinctrl_vcc_sd3: vccsd3grp {
452			fsl,pins = <
453				MX6SX_PAD_KEY_COL1__GPIO2_IO_11		0x17059
454			>;
455		};
456
457		pinctrl_uart1: uart1grp {
458			fsl,pins = <
459				MX6SX_PAD_GPIO1_IO04__UART1_TX		0x1b0b1
460				MX6SX_PAD_GPIO1_IO05__UART1_RX		0x1b0b1
461			>;
462		};
463
464		pinctrl_uart5: uart5grp {
465			fsl,pins = <
466				MX6SX_PAD_KEY_ROW3__UART5_RX		0x1b0b1
467				MX6SX_PAD_KEY_COL3__UART5_TX		0x1b0b1
468				MX6SX_PAD_KEY_ROW2__UART5_CTS_B		0x1b0b1
469				MX6SX_PAD_KEY_COL2__UART5_RTS_B		0x1b0b1
470			>;
471		};
472
473		pinctrl_usb_otg1: usbotg1grp {
474			fsl,pins = <
475				MX6SX_PAD_GPIO1_IO09__GPIO1_IO_9	0x10b0
476			>;
477		};
478
479		pinctrl_usb_otg1_id: usbotg1idgrp {
480			fsl,pins = <
481				MX6SX_PAD_GPIO1_IO10__ANATOP_OTG1_ID	0x17059
482			>;
483		};
484
485		pinctrl_usb_otg2: usbot2ggrp {
486			fsl,pins = <
487				MX6SX_PAD_GPIO1_IO12__GPIO1_IO_12	0x10b0
488			>;
489		};
490
491		pinctrl_usdhc2: usdhc2grp {
492			fsl,pins = <
493				MX6SX_PAD_SD2_CMD__USDHC2_CMD		0x17059
494				MX6SX_PAD_SD2_CLK__USDHC2_CLK		0x10059
495				MX6SX_PAD_SD2_DATA0__USDHC2_DATA0	0x17059
496				MX6SX_PAD_SD2_DATA1__USDHC2_DATA1	0x17059
497				MX6SX_PAD_SD2_DATA2__USDHC2_DATA2	0x17059
498				MX6SX_PAD_SD2_DATA3__USDHC2_DATA3	0x17059
499			>;
500		};
501
502		pinctrl_usdhc3: usdhc3grp {
503			fsl,pins = <
504				MX6SX_PAD_SD3_CMD__USDHC3_CMD		0x17059
505				MX6SX_PAD_SD3_CLK__USDHC3_CLK		0x10059
506				MX6SX_PAD_SD3_DATA0__USDHC3_DATA0	0x17059
507				MX6SX_PAD_SD3_DATA1__USDHC3_DATA1	0x17059
508				MX6SX_PAD_SD3_DATA2__USDHC3_DATA2	0x17059
509				MX6SX_PAD_SD3_DATA3__USDHC3_DATA3	0x17059
510				MX6SX_PAD_SD3_DATA4__USDHC3_DATA4	0x17059
511				MX6SX_PAD_SD3_DATA5__USDHC3_DATA5	0x17059
512				MX6SX_PAD_SD3_DATA6__USDHC3_DATA6	0x17059
513				MX6SX_PAD_SD3_DATA7__USDHC3_DATA7	0x17059
514				MX6SX_PAD_KEY_COL0__GPIO2_IO_10		0x17059 /* CD */
515				MX6SX_PAD_KEY_ROW0__GPIO2_IO_15		0x17059 /* WP */
516			>;
517		};
518
519		pinctrl_usdhc3_100mhz: usdhc3grp-100mhz {
520			fsl,pins = <
521				MX6SX_PAD_SD3_CMD__USDHC3_CMD		0x170b9
522				MX6SX_PAD_SD3_CLK__USDHC3_CLK		0x100b9
523				MX6SX_PAD_SD3_DATA0__USDHC3_DATA0	0x170b9
524				MX6SX_PAD_SD3_DATA1__USDHC3_DATA1	0x170b9
525				MX6SX_PAD_SD3_DATA2__USDHC3_DATA2	0x170b9
526				MX6SX_PAD_SD3_DATA3__USDHC3_DATA3	0x170b9
527				MX6SX_PAD_SD3_DATA4__USDHC3_DATA4	0x170b9
528				MX6SX_PAD_SD3_DATA5__USDHC3_DATA5	0x170b9
529				MX6SX_PAD_SD3_DATA6__USDHC3_DATA6	0x170b9
530				MX6SX_PAD_SD3_DATA7__USDHC3_DATA7	0x170b9
531			>;
532		};
533
534		pinctrl_usdhc3_200mhz: usdhc3grp-200mhz {
535			fsl,pins = <
536				MX6SX_PAD_SD3_CMD__USDHC3_CMD		0x170f9
537				MX6SX_PAD_SD3_CLK__USDHC3_CLK		0x100f9
538				MX6SX_PAD_SD3_DATA0__USDHC3_DATA0	0x170f9
539				MX6SX_PAD_SD3_DATA1__USDHC3_DATA1	0x170f9
540				MX6SX_PAD_SD3_DATA2__USDHC3_DATA2	0x170f9
541				MX6SX_PAD_SD3_DATA3__USDHC3_DATA3	0x170f9
542				MX6SX_PAD_SD3_DATA4__USDHC3_DATA4	0x170f9
543				MX6SX_PAD_SD3_DATA5__USDHC3_DATA5	0x170f9
544				MX6SX_PAD_SD3_DATA6__USDHC3_DATA6	0x170f9
545				MX6SX_PAD_SD3_DATA7__USDHC3_DATA7	0x170f9
546			>;
547		};
548
549		pinctrl_usdhc4: usdhc4grp {
550			fsl,pins = <
551				MX6SX_PAD_SD4_CMD__USDHC4_CMD		0x17059
552				MX6SX_PAD_SD4_CLK__USDHC4_CLK		0x10059
553				MX6SX_PAD_SD4_DATA0__USDHC4_DATA0	0x17059
554				MX6SX_PAD_SD4_DATA1__USDHC4_DATA1	0x17059
555				MX6SX_PAD_SD4_DATA2__USDHC4_DATA2	0x17059
556				MX6SX_PAD_SD4_DATA3__USDHC4_DATA3	0x17059
557				MX6SX_PAD_SD4_DATA7__GPIO6_IO_21	0x17059 /* CD */
558				MX6SX_PAD_SD4_DATA6__GPIO6_IO_20	0x17059 /* WP */
559			>;
560		};
561	};
562};
563