1/*
2 * DTS file for CSR SiRFatlas7 Evaluation Board
3 *
4 * Copyright (c) 2014 Cambridge Silicon Radio Limited, a CSR plc group company.
5 *
6 * Licensed under GPLv2 or later.
7 */
8
9/dts-v1/;
10
11/include/ "atlas7.dtsi"
12
13/ {
14	model = "CSR SiRFatlas7 Evaluation Board";
15	compatible = "sirf,atlas7-cb", "sirf,atlas7";
16
17	chosen {
18		bootargs = "console=ttySiRF1,115200 earlyprintk";
19	};
20
21	memory {
22		device_type = "memory";
23		reg = <0x40000000 0x20000000>;
24	};
25
26	reserved-memory {
27		#address-cells = <1>;
28		#size-cells = <1>;
29		ranges;
30
31		vpp_reserved: vpp_mem@5e800000 {
32			compatible = "sirf,reserved-memory";
33			reg = <0x5e800000 0x800000>;
34		};
35
36		nanddisk_reserved: nanddisk@46000000 {
37			reg = <0x46000000 0x200000>;
38			no-map;
39		};
40	};
41
42
43	noc {
44		mediam {
45			nand@17050000 {
46				memory-region = <&nanddisk_reserved>;
47			};
48		};
49
50		gnssm {
51			spi1: spi@18200000 {
52				status = "okay";
53				spiflash: macronix@0{
54					status = "okay";
55					compatible = "macronix,mx25l6405d";
56					reg = <0>;
57					spi-max-frequency = <37500000>;
58					spi-cpha;
59					spi-cpol;
60					#address-cells = <1>;
61					#size-cells = <1>;
62					partitions@0 {
63						label = "myspiboot";
64						reg = <0x0 0x800000>;
65					};
66				};
67			};
68		};
69
70		btm {
71			uart6: uart@11000000 {
72				status = "okay";
73				sirf,uart-has-rtscts;
74			};
75		};
76
77		disp-iobg {
78			vpp@13110000 {
79				memory-region = <&vpp_reserved>;
80			};
81		};
82
83		display0: display@0 {
84			compatible = "lvds-panel";
85			source = "lvds.0";
86
87			bl-gpios = <&gpio_1 63 0>;
88			data-lines  = <24>;
89
90			display-timings {
91				native-mode = <&timing0>;
92				timing0: timing0 {
93					clock-frequency = <60000000>;
94					hactive = <1024>;
95					vactive = <600>;
96					hfront-porch = <220>;
97					hback-porch = <100>;
98					hsync-len = <1>;
99					vback-porch = <10>;
100					vfront-porch = <25>;
101					vsync-len = <1>;
102					hsync-active = <0>;
103					vsync-active = <0>;
104					de-active = <1>;
105					pixelclk-active = <1>;
106				};
107			};
108		};
109	};
110};
111