1Kernel driver w1_ds28e04
2========================
3
4Supported chips:
5  * Maxim DS28E04-100 4096-Bit Addressable 1-Wire EEPROM with PIO
6
7supported family codes:
8	W1_FAMILY_DS28E04	0x1C
9
10Author: Markus Franke, <franke.m@sebakmt.com> <franm@hrz.tu-chemnitz.de>
11
12Description
13-----------
14
15Support is provided through the sysfs files "eeprom" and "pio". CRC checking
16during memory accesses can optionally be enabled/disabled via the device
17attribute "crccheck". The strong pull-up can optionally be enabled/disabled
18via the module parameter "w1_strong_pullup".
19
20Memory Access
21
22	A read operation on the "eeprom" file reads the given amount of bytes
23	from the EEPROM of the DS28E04.
24
25	A write operation on the "eeprom" file writes the given byte sequence
26	to the EEPROM of the DS28E04. If CRC checking mode is enabled only
27	fully aligned blocks of 32 bytes with valid CRC16 values (in bytes 30
28	and 31) are allowed to be written.
29
30PIO Access
31
32	The 2 PIOs of the DS28E04-100 are accessible via the "pio" sysfs file.
33
34	The current status of the PIO's is returned as an 8 bit value. Bit 0/1
35	represent the state of PIO_0/PIO_1. Bits 2..7 do not care. The PIO's are
36	driven low-active, i.e. the driver delivers/expects low-active values.
37