1* Renesas R-Car Compare Match Timer (CMT)
2
3The CMT is a multi-channel 16/32/48-bit timer/counter with configurable clock
4inputs and programmable compare match.
5
6Channels share hardware resources but their counter and compare match value
7are independent. A particular CMT instance can implement only a subset of the
8channels supported by the CMT model. Channel indices represent the hardware
9position of the channel in the CMT and don't match the channel numbers in the
10datasheets.
11
12Required Properties:
13
14  - compatible: must contain one or more of the following:
15    - "renesas,cmt-32-r8a7740" for the r8a7740 32-bit CMT
16		(CMT0)
17    - "renesas,cmt-32-sh7372" for the sh7372 32-bit CMT
18		(CMT0)
19    - "renesas,cmt-32-sh73a0" for the sh73a0 32-bit CMT
20		(CMT0)
21    - "renesas,cmt-32" for all 32-bit CMT without fast clock support
22		(CMT0 on sh7372, sh73a0 and r8a7740)
23		This is a fallback for the above renesas,cmt-32-* entries.
24
25    - "renesas,cmt-32-fast-r8a7740" for the r8a7740 32-bit CMT with fast
26		clock support (CMT[234])
27    - "renesas,cmt-32-fast-sh7372" for the sh7372 32-bit CMT with fast
28		clock support (CMT[234])
29    - "renesas,cmt-32-fast-sh73a0" for the sh73A0 32-bit CMT with fast
30		clock support (CMT[234])
31    - "renesas,cmt-32-fast" for all 32-bit CMT with fast clock support
32		(CMT[234] on sh7372, sh73a0 and r8a7740)
33		This is a fallback for the above renesas,cmt-32-fast-* entries.
34
35    - "renesas,cmt-48-sh7372" for the sh7372 48-bit CMT
36		(CMT1)
37    - "renesas,cmt-48-sh73a0" for the sh73A0 48-bit CMT
38		(CMT1)
39    - "renesas,cmt-48-r8a7740" for the r8a7740 48-bit CMT
40		(CMT1)
41    - "renesas,cmt-48" for all non-second generation 48-bit CMT
42		(CMT1 on sh7372, sh73a0 and r8a7740)
43		This is a fallback for the above renesas,cmt-48-* entries.
44
45    - "renesas,cmt-48-r8a73a4" for the r8a73a4 48-bit CMT
46		(CMT[01])
47    - "renesas,cmt-48-r8a7790" for the r8a7790 48-bit CMT
48		(CMT[01])
49    - "renesas,cmt-48-r8a7791" for the r8a7791 48-bit CMT
50		(CMT[01])
51    - "renesas,cmt-48-gen2" for all second generation 48-bit CMT
52		(CMT[01] on r8a73a4, r8a7790 and r8a7791)
53		This is a fallback for the renesas,cmt-48-r8a73a4,
54		renesas,cmt-48-r8a7790 and renesas,cmt-48-r8a7791 entries.
55
56  - reg: base address and length of the registers block for the timer module.
57  - interrupts: interrupt-specifier for the timer, one per channel.
58  - clocks: a list of phandle + clock-specifier pairs, one for each entry
59    in clock-names.
60  - clock-names: must contain "fck" for the functional clock.
61
62  - renesas,channels-mask: bitmask of the available channels.
63
64
65Example: R8A7790 (R-Car H2) CMT0 node
66
67	CMT0 on R8A7790 implements hardware channels 5 and 6 only and names
68	them channels 0 and 1 in the documentation.
69
70	cmt0: timer@ffca0000 {
71		compatible = "renesas,cmt-48-r8a7790", "renesas,cmt-48-gen2";
72		reg = <0 0xffca0000 0 0x1004>;
73		interrupts = <0 142 IRQ_TYPE_LEVEL_HIGH>,
74			     <0 142 IRQ_TYPE_LEVEL_HIGH>;
75		clocks = <&mstp1_clks R8A7790_CLK_CMT0>;
76		clock-names = "fck";
77
78		renesas,channels-mask = <0x60>;
79	};
80