1Every GPIO controller node must have #gpio-cells property defined,
2this information will be used to translate gpio-specifiers.
3
4On CPM1 devices, all ports are using slightly different register layouts.
5Ports A, C and D are 16bit ports and Ports B and E are 32bit ports.
6
7On CPM2 devices, all ports are 32bit ports and use a common register layout.
8
9Required properties:
10- compatible : "fsl,cpm1-pario-bank-a", "fsl,cpm1-pario-bank-b",
11  "fsl,cpm1-pario-bank-c", "fsl,cpm1-pario-bank-d",
12  "fsl,cpm1-pario-bank-e", "fsl,cpm2-pario-bank"
13- #gpio-cells : Should be two. The first cell is the pin number and the
14  second cell is used to specify optional parameters (currently unused).
15- gpio-controller : Marks the port as GPIO controller.
16
17Example of three SOC GPIO banks defined as gpio-controller nodes:
18
19	CPM1_PIO_A: gpio-controller@950 {
20		#gpio-cells = <2>;
21		compatible = "fsl,cpm1-pario-bank-a";
22		reg = <0x950 0x10>;
23		gpio-controller;
24	};
25
26	CPM1_PIO_B: gpio-controller@ab8 {
27		#gpio-cells = <2>;
28		compatible = "fsl,cpm1-pario-bank-b";
29		reg = <0xab8 0x10>;
30		gpio-controller;
31	};
32
33	CPM1_PIO_E: gpio-controller@ac8 {
34		#gpio-cells = <2>;
35		compatible = "fsl,cpm1-pario-bank-e";
36		reg = <0xac8 0x18>;
37		gpio-controller;
38	};
39