1Qualcomm MSM8916 TLMM block
2
3This binding describes the Top Level Mode Multiplexer block found in the
4MSM8916 platform.
5
6- compatible:
7	Usage: required
8	Value type: <string>
9	Definition: must be "qcom,msm8916-pinctrl"
10
11- reg:
12	Usage: required
13	Value type: <prop-encoded-array>
14	Definition: the base address and size of the TLMM register space.
15
16- interrupts:
17	Usage: required
18	Value type: <prop-encoded-array>
19	Definition: should specify the TLMM summary IRQ.
20
21- interrupt-controller:
22	Usage: required
23	Value type: <none>
24	Definition: identifies this node as an interrupt controller
25
26- #interrupt-cells:
27	Usage: required
28	Value type: <u32>
29	Definition: must be 2. Specifying the pin number and flags, as defined
30		    in <dt-bindings/interrupt-controller/irq.h>
31
32- gpio-controller:
33	Usage: required
34	Value type: <none>
35	Definition: identifies this node as a gpio controller
36
37- #gpio-cells:
38	Usage: required
39	Value type: <u32>
40	Definition: must be 2. Specifying the pin number and flags, as defined
41		    in <dt-bindings/gpio/gpio.h>
42
43Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for
44a general description of GPIO and interrupt bindings.
45
46Please refer to pinctrl-bindings.txt in this directory for details of the
47common pinctrl bindings used by client devices, including the meaning of the
48phrase "pin configuration node".
49
50The pin configuration nodes act as a container for an arbitrary number of
51subnodes. Each of these subnodes represents some desired configuration for a
52pin, a group, or a list of pins or groups. This configuration can include the
53mux function to select on those pin(s)/group(s), and various pin configuration
54parameters, such as pull-up, drive strength, etc.
55
56
57PIN CONFIGURATION NODES:
58
59The name of each subnode is not important; all subnodes should be enumerated
60and processed purely based on their content.
61
62Each subnode only affects those parameters that are explicitly listed. In
63other words, a subnode that lists a mux function but no pin configuration
64parameters implies no information about any pin configuration parameters.
65Similarly, a pin subnode that describes a pullup parameter implies no
66information about e.g. the mux function.
67
68
69The following generic properties as defined in pinctrl-bindings.txt are valid
70to specify in a pin configuration subnode:
71
72- pins:
73	Usage: required
74	Value type: <string-array>
75	Definition: List of gpio pins affected by the properties specified in
76		    this subnode.  Valid pins are:
77		    gpio0-gpio121,
78		    sdc1_clk,
79		    sdc1_cmd,
80		    sdc1_data
81		    sdc2_clk,
82		    sdc2_cmd,
83		    sdc2_data,
84		    qdsd_cmd,
85		    qdsd_data0,
86		    qdsd_data1,
87		    qdsd_data2,
88		    qdsd_data3
89
90- function:
91	Usage: required
92	Value type: <string>
93	Definition: Specify the alternative function to be configured for the
94		    specified pins. Functions are only valid for gpio pins.
95		    Valid values are:
96	adsp_ext, alsp_int, atest_bbrx0, atest_bbrx1, atest_char, atest_char0,
97	atest_char1, atest_char2, atest_char3, atest_combodac, atest_gpsadc0,
98	atest_gpsadc1, atest_tsens, atest_wlan0, atest_wlan1, backlight_en,
99	bimc_dte0,bimc_dte1, blsp_i2c1, blsp_i2c2, blsp_i2c3, blsp_i2c4,
100	blsp_i2c5, blsp_i2c6, blsp_spi1, blsp_spi1_cs1, blsp_spi1_cs2,
101	blsp_spi1_cs3, blsp_spi2, blsp_spi2_cs1, blsp_spi2_cs2, blsp_spi2_cs3,
102	blsp_spi3, blsp_spi3_cs1, blsp_spi3_cs2, blsp_spi3_cs3, blsp_spi4,
103	blsp_spi5, blsp_spi6, blsp_uart1, blsp_uart2, blsp_uim1, blsp_uim2,
104	cam1_rst, cam1_standby, cam_mclk0, cam_mclk1, cci_async, cci_i2c,
105	cci_timer0, cci_timer1, cci_timer2, cdc_pdm0, codec_mad, dbg_out,
106	display_5v, dmic0_clk, dmic0_data, dsi_rst, ebi0_wrcdc, euro_us,
107	ext_lpass, flash_strobe, gcc_gp1_clk_a, gcc_gp1_clk_b, gcc_gp2_clk_a,
108	gcc_gp2_clk_b, gcc_gp3_clk_a, gcc_gp3_clk_b, gpio, gsm0_tx0, gsm0_tx1,
109	gsm1_tx0, gsm1_tx1, gyro_accl, kpsns0, kpsns1, kpsns2, ldo_en,
110	ldo_update, mag_int, mdp_vsync, modem_tsync, m_voc, nav_pps, nav_tsync,
111	pa_indicator, pbs0, pbs1, pbs2, pri_mi2s, pri_mi2s_ws, prng_rosc,
112	pwr_crypto_enabled_a, pwr_crypto_enabled_b, pwr_modem_enabled_a,
113	pwr_modem_enabled_b, pwr_nav_enabled_a, pwr_nav_enabled_b,
114	qdss_ctitrig_in_a0, qdss_ctitrig_in_a1, qdss_ctitrig_in_b0,
115	qdss_ctitrig_in_b1, qdss_ctitrig_out_a0, qdss_ctitrig_out_a1,
116	qdss_ctitrig_out_b0, qdss_ctitrig_out_b1, qdss_traceclk_a,
117	qdss_traceclk_b, qdss_tracectl_a, qdss_tracectl_b, qdss_tracedata_a,
118	qdss_tracedata_b, reset_n, sd_card, sd_write, sec_mi2s, smb_int,
119	ssbi_wtr0, ssbi_wtr1, uim1, uim2, uim3, uim_batt, wcss_bt, wcss_fm,
120	wcss_wlan, webcam1_rst
121
122- bias-disable:
123	Usage: optional
124	Value type: <none>
125	Definition: The specified pins should be configued as no pull.
126
127- bias-pull-down:
128	Usage: optional
129	Value type: <none>
130	Definition: The specified pins should be configued as pull down.
131
132- bias-pull-up:
133	Usage: optional
134	Value type: <none>
135	Definition: The specified pins should be configued as pull up.
136
137- output-high:
138	Usage: optional
139	Value type: <none>
140	Definition: The specified pins are configured in output mode, driven
141		    high.
142		    Not valid for sdc pins.
143
144- output-low:
145	Usage: optional
146	Value type: <none>
147	Definition: The specified pins are configured in output mode, driven
148		    low.
149		    Not valid for sdc pins.
150
151- drive-strength:
152	Usage: optional
153	Value type: <u32>
154	Definition: Selects the drive strength for the specified pins, in mA.
155		    Valid values are: 2, 4, 6, 8, 10, 12, 14 and 16
156
157Example:
158
159	tlmm: pinctrl@1000000 {
160		compatible = "qcom,msm8916-pinctrl";
161		reg = <0x1000000 0x300000>;
162		interrupts = <0 208 0>;
163		gpio-controller;
164		#gpio-cells = <2>;
165		interrupt-controller;
166		#interrupt-cells = <2>;
167
168		uart2: uart2-default {
169			mux {
170				pins = "gpio4", "gpio5";
171				function = "blsp_uart2";
172			};
173
174			tx {
175				pins = "gpio4";
176				drive-strength = <4>;
177				bias-disable;
178			};
179
180			rx {
181				pins = "gpio5";
182				drive-strength = <2>;
183				bias-pull-up;
184			};
185		};
186	};
187