1* Freescale General-Purpose Media Interface (GPMI) 2 3The GPMI nand controller provides an interface to control the 4NAND flash chips. 5 6Required properties: 7 - compatible : should be "fsl,<chip>-gpmi-nand" 8 - reg : should contain registers location and length for gpmi and bch. 9 - reg-names: Should contain the reg names "gpmi-nand" and "bch" 10 - interrupts : BCH interrupt number. 11 - interrupt-names : Should be "bch". 12 - dmas: DMA specifier, consisting of a phandle to DMA controller node 13 and GPMI DMA channel ID. 14 Refer to dma.txt and fsl-mxs-dma.txt for details. 15 - dma-names: Must be "rx-tx". 16 17Optional properties: 18 - nand-on-flash-bbt: boolean to enable on flash bbt option if not 19 present false 20 - fsl,use-minimum-ecc: Protect this NAND flash with the minimum ECC 21 strength required. The required ECC strength is 22 automatically discoverable for some flash 23 (e.g., according to the ONFI standard). 24 However, note that if this strength is not 25 discoverable or this property is not enabled, 26 the software may chooses an implementation-defined 27 ECC scheme. 28 - fsl,no-blockmark-swap: Don't swap the bad block marker from the OOB 29 area with the byte in the data area but rely on the 30 flash based BBT for identifying bad blocks. 31 NOTE: this is only valid in conjunction with 32 'nand-on-flash-bbt'. 33 WARNING: on i.MX28 blockmark swapping cannot be 34 disabled for the BootROM in the FCB. Thus, 35 partitions written from Linux with this feature 36 turned on may not be accessible by the BootROM 37 code. 38 39The device tree may optionally contain sub-nodes describing partitions of the 40address space. See partition.txt for more detail. 41 42Examples: 43 44gpmi-nand@8000c000 { 45 compatible = "fsl,imx28-gpmi-nand"; 46 #address-cells = <1>; 47 #size-cells = <1>; 48 reg = <0x8000c000 2000>, <0x8000a000 2000>; 49 reg-names = "gpmi-nand", "bch"; 50 interrupts = <41>; 51 interrupt-names = "bch"; 52 dmas = <&dma_apbh 4>; 53 dma-names = "rx-tx"; 54 55 partition@0 { 56 ... 57 }; 58}; 59