1Freescale Localbus UPM programmed to work with NAND flash
2
3Required properties:
4- compatible : "fsl,upm-nand".
5- reg : should specify localbus chip select and size used for the chip.
6- fsl,upm-addr-offset : UPM pattern offset for the address latch.
7- fsl,upm-cmd-offset : UPM pattern offset for the command latch.
8
9Optional properties:
10- fsl,upm-wait-flags : add chip-dependent short delays after running the
11	UPM pattern (0x1), after writing a data byte (0x2) or after
12	writing out a buffer (0x4).
13- fsl,upm-addr-line-cs-offsets : address offsets for multi-chip support.
14	The corresponding address lines are used to select the chip.
15- gpios : may specify optional GPIOs connected to the Ready-Not-Busy pins
16	(R/B#). For multi-chip devices, "n" GPIO definitions are required
17	according to the number of chips.
18- chip-delay : chip dependent delay for transferring data from array to
19	read registers (tR). Required if property "gpios" is not used
20	(R/B# pins not connected).
21
22Each flash chip described may optionally contain additional sub-nodes
23describing partitions of the address space. See partition.txt for more
24detail.
25
26Examples:
27
28upm@1,0 {
29	compatible = "fsl,upm-nand";
30	reg = <1 0 1>;
31	fsl,upm-addr-offset = <16>;
32	fsl,upm-cmd-offset = <8>;
33	gpios = <&qe_pio_e 18 0>;
34
35	flash {
36		#address-cells = <1>;
37		#size-cells = <1>;
38		compatible = "...";
39
40		partition@0 {
41			...
42		};
43	};
44};
45
46upm@3,0 {
47	#address-cells = <0>;
48	#size-cells = <0>;
49	compatible = "tqc,tqm8548-upm-nand", "fsl,upm-nand";
50	reg = <3 0x0 0x800>;
51	fsl,upm-addr-offset = <0x10>;
52	fsl,upm-cmd-offset = <0x08>;
53	/* Multi-chip NAND device */
54	fsl,upm-addr-line-cs-offsets = <0x0 0x200>;
55	fsl,upm-wait-flags = <0x5>;
56	chip-delay = <25>; // in micro-seconds
57
58	nand@0 {
59		#address-cells = <1>;
60		#size-cells = <1>;
61
62		partition@0 {
63			    label = "fs";
64			    reg = <0x00000000 0x10000000>;
65		};
66	};
67};
68