1* Freescale Enhanced Secure Digital Host Controller (eSDHC) for i.MX 2 3The Enhanced Secure Digital Host Controller on Freescale i.MX family 4provides an interface for MMC, SD, and SDIO types of memory cards. 5 6This file documents differences between the core properties described 7by mmc.txt and the properties used by the sdhci-esdhc-imx driver. 8 9Required properties: 10- compatible : Should be "fsl,<chip>-esdhc" 11 12Optional properties: 13- fsl,cd-controller : Indicate to use controller internal card detection 14- fsl,wp-controller : Indicate to use controller internal write protection 15- fsl,delay-line : Specify the number of delay cells for override mode. 16 This is used to set the clock delay for DLL(Delay Line) on override mode 17 to select a proper data sampling window in case the clock quality is not good 18 due to signal path is too long on the board. Please refer to eSDHC/uSDHC 19 chapter, DLL (Delay Line) section in RM for details. 20- voltage-ranges : Specify the voltage range in case there are software 21 transparent level shifters on the outputs of the controller. Two cells are 22 required, first cell specifies minimum slot voltage (mV), second cell 23 specifies maximum slot voltage (mV). Several ranges could be specified. 24 25Examples: 26 27esdhc@70004000 { 28 compatible = "fsl,imx51-esdhc"; 29 reg = <0x70004000 0x4000>; 30 interrupts = <1>; 31 fsl,cd-controller; 32 fsl,wp-controller; 33}; 34 35esdhc@70008000 { 36 compatible = "fsl,imx51-esdhc"; 37 reg = <0x70008000 0x4000>; 38 interrupts = <2>; 39 cd-gpios = <&gpio1 6 0>; /* GPIO1_6 */ 40 wp-gpios = <&gpio1 5 0>; /* GPIO1_5 */ 41}; 42