1* Rockchip RK3xxx I2C controller
2
3This driver interfaces with the native I2C controller present in Rockchip
4RK3xxx SoCs.
5
6Required properties :
7
8 - reg : Offset and length of the register set for the device
9 - compatible : should be "rockchip,rk3066-i2c", "rockchip,rk3188-i2c" or
10		"rockchip,rk3288-i2c".
11 - interrupts : interrupt number
12 - clocks : parent clock
13
14Required on RK3066, RK3188 :
15
16 - rockchip,grf : the phandle of the syscon node for the general register
17		  file (GRF)
18 - on those SoCs an alias with the correct I2C bus ID (bit offset in the GRF)
19   is also required.
20
21Optional properties :
22
23 - clock-frequency : SCL frequency to use (in Hz). If omitted, 100kHz is used.
24 - i2c-scl-rising-time-ns : Number of nanoseconds the SCL signal takes to rise
25	(t(r) in I2C specification). If not specified this is assumed to be
26	the maximum the specification allows(1000 ns for Standard-mode,
27	300 ns for Fast-mode) which might cause slightly slower communication.
28 - i2c-scl-falling-time-ns : Number of nanoseconds the SCL signal takes to fall
29	(t(f) in the I2C specification). If not specified this is assumed to
30	be the maximum the specification allows (300 ns) which might cause
31	slightly slower communication.
32 - i2c-sda-falling-time-ns : Number of nanoseconds the SDA signal takes to fall
33	(t(f) in the I2C specification). If not specified we'll use the SCL
34	value since they are the same in nearly all cases.
35
36Example:
37
38aliases {
39	i2c0 = &i2c0;
40}
41
42i2c0: i2c@2002d000 {
43	compatible = "rockchip,rk3188-i2c";
44	reg = <0x2002d000 0x1000>;
45	interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
46	#address-cells = <1>;
47	#size-cells = <0>;
48
49	rockchip,grf = <&grf>;
50
51	clock-names = "i2c";
52	clocks = <&cru PCLK_I2C0>;
53
54	i2c-scl-rising-time-ns = <800>;
55	i2c-scl-falling-time-ns = <100>;
56};
57