1* Freescale Inter IC (I2C) and High Speed Inter IC (HS-I2C) for i.MX
2
3Required properties:
4- compatible :
5  - "fsl,imx1-i2c" for I2C compatible with the one integrated on i.MX1 SoC
6  - "fsl,imx21-i2c" for I2C compatible with the one integrated on i.MX21 SoC
7  - "fsl,vf610-i2c" for I2C compatible with the one integrated on Vybrid vf610 SoC
8- reg : Should contain I2C/HS-I2C registers location and length
9- interrupts : Should contain I2C/HS-I2C interrupt
10- clocks : Should contain the I2C/HS-I2C clock specifier
11
12Optional properties:
13- clock-frequency : Constains desired I2C/HS-I2C bus clock frequency in Hz.
14  The absence of the propoerty indicates the default frequency 100 kHz.
15- dmas: A list of two dma specifiers, one for each entry in dma-names.
16- dma-names: should contain "tx" and "rx".
17
18Examples:
19
20i2c@83fc4000 { /* I2C2 on i.MX51 */
21	compatible = "fsl,imx51-i2c", "fsl,imx21-i2c";
22	reg = <0x83fc4000 0x4000>;
23	interrupts = <63>;
24};
25
26i2c@70038000 { /* HS-I2C on i.MX51 */
27	compatible = "fsl,imx51-i2c", "fsl,imx21-i2c";
28	reg = <0x70038000 0x4000>;
29	interrupts = <64>;
30	clock-frequency = <400000>;
31};
32
33i2c0: i2c@40066000 { /* i2c0 on vf610 */
34	compatible = "fsl,vf610-i2c";
35	reg = <0x40066000 0x1000>;
36	interrupts =<0 71 0x04>;
37	dmas = <&edma0 0 50>,
38		<&edma0 0 51>;
39	dma-names = "rx","tx";
40};
41