1* Freescale VF610 PORT/GPIO module
2
3The Freescale PORT/GPIO modules are two adjacent modules providing GPIO
4functionality. Each pair serves 32 GPIOs. The VF610 has 5 instances of
5each, and each PORT module has its own interrupt.
6
7Required properties for GPIO node:
8- compatible : Should be "fsl,<soc>-gpio", currently "fsl,vf610-gpio"
9- reg : The first reg tuple represents the PORT module, the second tuple
10  the GPIO module.
11- interrupts : Should be the port interrupt shared by all 32 pins.
12- gpio-controller : Marks the device node as a gpio controller.
13- #gpio-cells : Should be two. The first cell is the pin number and
14  the second cell is used to specify the gpio polarity:
15      0 = active high
16      1 = active low
17- interrupt-controller: Marks the device node as an interrupt controller.
18- #interrupt-cells : Should be 2.  The first cell is the GPIO number.
19  The second cell bits[3:0] is used to specify trigger type and level flags:
20      1 = low-to-high edge triggered.
21      2 = high-to-low edge triggered.
22      4 = active high level-sensitive.
23      8 = active low level-sensitive.
24
25Note: Each GPIO port should have an alias correctly numbered in "aliases"
26node.
27
28Examples:
29
30aliases {
31	gpio0 = &gpio1;
32	gpio1 = &gpio2;
33};
34
35gpio1: gpio@40049000 {
36	compatible = "fsl,vf610-gpio";
37	reg = <0x40049000 0x1000 0x400ff000 0x40>;
38	interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>;
39	gpio-controller;
40	#gpio-cells = <2>;
41	interrupt-controller;
42	#interrupt-cells = <2>;
43	gpio-ranges = <&iomuxc 0 0 32>;
44};
45
46gpio2: gpio@4004a000 {
47	compatible = "fsl,vf610-gpio";
48	reg = <0x4004a000 0x1000 0x400ff040 0x40>;
49	interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>;
50	gpio-controller;
51	#gpio-cells = <2>;
52	interrupt-controller;
53	#interrupt-cells = <2>;
54	gpio-ranges = <&iomuxc 0 32 32>;
55};
56