1Xilinx AXI VDMA engine, it does transfers between memory and video devices.
2It can be configured to have one channel or two channels. If configured
3as two channels, one is to transmit to the video device and another is
4to receive from the video device.
5
6Required properties:
7- compatible: Should be "xlnx,axi-vdma-1.00.a"
8- #dma-cells: Should be <1>, see "dmas" property below
9- reg: Should contain VDMA registers location and length.
10- xlnx,num-fstores: Should be the number of framebuffers as configured in h/w.
11- dma-channel child node: Should have at least one channel and can have up to
12	two channels per device. This node specifies the properties of each
13	DMA channel (see child node properties below).
14
15Optional properties:
16- xlnx,include-sg: Tells configured for Scatter-mode in
17	the hardware.
18- xlnx,flush-fsync: Tells which channel to Flush on Frame sync.
19	It takes following values:
20	{1}, flush both channels
21	{2}, flush mm2s channel
22	{3}, flush s2mm channel
23
24Required child node properties:
25- compatible: It should be either "xlnx,axi-vdma-mm2s-channel" or
26	"xlnx,axi-vdma-s2mm-channel".
27- interrupts: Should contain per channel VDMA interrupts.
28- xlnx,datawidth: Should contain the stream data width, take values
29	{32,64...1024}.
30
31Optional child node properties:
32- xlnx,include-dre: Tells hardware is configured for Data
33	Realignment Engine.
34- xlnx,genlock-mode: Tells Genlock synchronization is
35	enabled/disabled in hardware.
36
37Example:
38++++++++
39
40axi_vdma_0: axivdma@40030000 {
41	compatible = "xlnx,axi-vdma-1.00.a";
42	#dma_cells = <1>;
43	reg = < 0x40030000 0x10000 >;
44	xlnx,num-fstores = <0x8>;
45	xlnx,flush-fsync = <0x1>;
46	dma-channel@40030000 {
47		compatible = "xlnx,axi-vdma-mm2s-channel";
48		interrupts = < 0 54 4 >;
49		xlnx,datawidth = <0x40>;
50	} ;
51	dma-channel@40030030 {
52		compatible = "xlnx,axi-vdma-s2mm-channel";
53		interrupts = < 0 53 4 >;
54		xlnx,datawidth = <0x40>;
55	} ;
56} ;
57
58
59* DMA client
60
61Required properties:
62- dmas: a list of <[Video DMA device phandle] [Channel ID]> pairs,
63	where Channel ID is '0' for write/tx and '1' for read/rx
64	channel.
65- dma-names: a list of DMA channel names, one per "dmas" entry
66
67Example:
68++++++++
69
70vdmatest_0: vdmatest@0 {
71	compatible ="xlnx,axi-vdma-test-1.00.a";
72	dmas = <&axi_vdma_0 0
73		&axi_vdma_0 1>;
74	dma-names = "vdma0", "vdma1";
75} ;
76