1* AHCI SATA Controller
2
3SATA nodes are defined to describe on-chip Serial ATA controllers.
4Each SATA controller should have its own node.
5
6It is possible, but not required, to represent each port as a sub-node.
7It allows to enable each port independently when dealing with multiple
8PHYs.
9
10Required properties:
11- compatible        : compatible string, one of:
12  - "allwinner,sun4i-a10-ahci"
13  - "hisilicon,hisi-ahci"
14  - "ibm,476gtr-ahci"
15  - "marvell,armada-380-ahci"
16  - "snps,dwc-ahci"
17  - "snps,exynos5440-ahci"
18  - "snps,spear-ahci"
19  - "generic-ahci"
20- interrupts        : <interrupt mapping for SATA IRQ>
21- reg               : <registers mapping>
22
23Please note that when using "generic-ahci" you must also specify a SoC specific
24compatible:
25	compatible = "manufacturer,soc-model-ahci", "generic-ahci";
26
27Optional properties:
28- dma-coherent      : Present if dma operations are coherent
29- clocks            : a list of phandle + clock specifier pairs
30- target-supply     : regulator for SATA target power
31- phys              : reference to the SATA PHY node
32- phy-names         : must be "sata-phy"
33- ports-implemented : Mask that indicates which ports that the HBA supports
34		      are available for software to use. Useful if PORTS_IMPL
35		      is not programmed by the BIOS, which is true with
36		      some embedded SOC's.
37
38Required properties when using sub-nodes:
39- #address-cells    : number of cells to encode an address
40- #size-cells       : number of cells representing the size of an address
41
42
43Sub-nodes required properties:
44- reg		    : the port number
45And at least one of the following properties:
46- phys		    : reference to the SATA PHY node
47- target-supply    : regulator for SATA target power
48
49Examples:
50        sata@ffe08000 {
51		compatible = "snps,spear-ahci";
52		reg = <0xffe08000 0x1000>;
53		interrupts = <115>;
54        };
55
56	ahci: sata@01c18000 {
57		compatible = "allwinner,sun4i-a10-ahci";
58		reg = <0x01c18000 0x1000>;
59		interrupts = <56>;
60		clocks = <&pll6 0>, <&ahb_gates 25>;
61		target-supply = <&reg_ahci_5v>;
62	};
63
64With sub-nodes:
65	sata@f7e90000 {
66		compatible = "marvell,berlin2q-achi", "generic-ahci";
67		reg = <0xe90000 0x1000>;
68		interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
69		clocks = <&chip CLKID_SATA>;
70		#address-cells = <1>;
71		#size-cells = <0>;
72
73		sata0: sata-port@0 {
74			reg = <0>;
75			phys = <&sata_phy 0>;
76			target-supply = <&reg_sata0>;
77		};
78
79		sata1: sata-port@1 {
80			reg = <1>;
81			phys = <&sata_phy 1>;
82			target-supply = <&reg_sata1>;;
83		};
84	};
85