Searched refs:usdhc3_sel (Results 1 - 4 of 4) sorted by relevance
| /linux-4.4.14/drivers/clk/imx/ |
| H A D | clk-imx6sl.c | 310 clks[IMX6SL_CLK_USDHC3_SEL] = imx_clk_fixup_mux("usdhc3_sel", base + 0x1c, 18, 1, usdhc_sels, ARRAY_SIZE(usdhc_sels), imx_cscmr1_fixup); imx6sl_clocks_init()
341 clks[IMX6SL_CLK_USDHC3_PODF] = imx_clk_divider("usdhc3_podf", "usdhc3_sel", base + 0x24, 19, 3); imx6sl_clocks_init()
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| H A D | clk-imx7d.c | 175 static const char *usdhc3_sel[] = { "osc", "pll_sys_pfd0_392m_clk", variable
510 clks[IMX7D_USDHC3_ROOT_SRC] = imx_clk_mux("usdhc3_src", base + 0xac00, 24, 3, usdhc3_sel, ARRAY_SIZE(usdhc3_sel)); imx7d_clocks_init()
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| H A D | clk-imx6q.c | 318 clk[IMX6QDL_CLK_USDHC3_SEL] = imx_clk_fixup_mux("usdhc3_sel", base + 0x1c, 18, 1, usdhc_sels, ARRAY_SIZE(usdhc_sels), imx_cscmr1_fixup); imx6q_clocks_init()
369 clk[IMX6QDL_CLK_USDHC3_PODF] = imx_clk_divider("usdhc3_podf", "usdhc3_sel", base + 0x24, 19, 3); imx6q_clocks_init()
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| H A D | clk-imx6sx.c | 290 clks[IMX6SX_CLK_USDHC3_SEL] = imx_clk_mux("usdhc3_sel", base + 0x1c, 18, 1, usdhc_sels, ARRAY_SIZE(usdhc_sels)); imx6sx_clocks_init()
338 clks[IMX6SX_CLK_USDHC3_PODF] = imx_clk_divider("usdhc3_podf", "usdhc3_sel", base + 0x24, 19, 3); imx6sx_clocks_init()
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