| H A D | uic.c | 2 * arch/powerpc/sysdev/uic.c
42 struct uic *primary_uic;
44 struct uic { struct
56 struct uic *uic = irq_data_get_irq_chip_data(d); uic_unmask_irq() local
62 raw_spin_lock_irqsave(&uic->lock, flags); uic_unmask_irq()
65 mtdcr(uic->dcrbase + UIC_SR, sr); uic_unmask_irq()
66 er = mfdcr(uic->dcrbase + UIC_ER); uic_unmask_irq()
68 mtdcr(uic->dcrbase + UIC_ER, er); uic_unmask_irq()
69 raw_spin_unlock_irqrestore(&uic->lock, flags); uic_unmask_irq()
74 struct uic *uic = irq_data_get_irq_chip_data(d); uic_mask_irq() local
79 raw_spin_lock_irqsave(&uic->lock, flags); uic_mask_irq()
80 er = mfdcr(uic->dcrbase + UIC_ER); uic_mask_irq()
82 mtdcr(uic->dcrbase + UIC_ER, er); uic_mask_irq()
83 raw_spin_unlock_irqrestore(&uic->lock, flags); uic_mask_irq()
88 struct uic *uic = irq_data_get_irq_chip_data(d); uic_ack_irq() local
92 raw_spin_lock_irqsave(&uic->lock, flags); uic_ack_irq()
93 mtdcr(uic->dcrbase + UIC_SR, 1 << (31-src)); uic_ack_irq()
94 raw_spin_unlock_irqrestore(&uic->lock, flags); uic_ack_irq()
99 struct uic *uic = irq_data_get_irq_chip_data(d); uic_mask_ack_irq() local
105 raw_spin_lock_irqsave(&uic->lock, flags); uic_mask_ack_irq()
106 er = mfdcr(uic->dcrbase + UIC_ER); uic_mask_ack_irq()
108 mtdcr(uic->dcrbase + UIC_ER, er); uic_mask_ack_irq()
118 mtdcr(uic->dcrbase + UIC_SR, sr); uic_mask_ack_irq()
119 raw_spin_unlock_irqrestore(&uic->lock, flags); uic_mask_ack_irq()
124 struct uic *uic = irq_data_get_irq_chip_data(d); uic_set_irq_type() local
153 raw_spin_lock_irqsave(&uic->lock, flags); uic_set_irq_type()
154 tr = mfdcr(uic->dcrbase + UIC_TR); uic_set_irq_type()
155 pr = mfdcr(uic->dcrbase + UIC_PR); uic_set_irq_type()
159 mtdcr(uic->dcrbase + UIC_PR, pr); uic_set_irq_type()
160 mtdcr(uic->dcrbase + UIC_TR, tr); uic_set_irq_type()
162 raw_spin_unlock_irqrestore(&uic->lock, flags); uic_set_irq_type()
179 struct uic *uic = h->host_data; uic_host_map() local
181 irq_set_chip_data(virq, uic); uic_host_map()
201 struct uic *uic = irq_desc_get_handler_data(desc); uic_irq_cascade() local
213 msr = mfdcr(uic->dcrbase + UIC_MSR); uic_irq_cascade()
219 subvirq = irq_linear_revmap(uic->irqhost, src); uic_irq_cascade()
231 static struct uic * __init uic_init_one(struct device_node *node) uic_init_one()
233 struct uic *uic; uic_init_one() local
237 BUG_ON(! of_device_is_compatible(node, "ibm,uic")); uic_init_one()
239 uic = kzalloc(sizeof(*uic), GFP_KERNEL); uic_init_one()
240 if (! uic) uic_init_one()
243 raw_spin_lock_init(&uic->lock); uic_init_one()
246 printk(KERN_ERR "uic: Device node %s has missing or invalid " uic_init_one()
250 uic->index = *indexp; uic_init_one()
254 printk(KERN_ERR "uic: Device node %s has missing or invalid " uic_init_one()
258 uic->dcrbase = *dcrreg; uic_init_one()
260 uic->irqhost = irq_domain_add_linear(node, NR_UIC_INTS, &uic_host_ops, uic_init_one()
261 uic); uic_init_one()
262 if (! uic->irqhost) uic_init_one()
266 mtdcr(uic->dcrbase + UIC_ER, 0); uic_init_one()
267 mtdcr(uic->dcrbase + UIC_CR, 0); uic_init_one()
268 mtdcr(uic->dcrbase + UIC_TR, 0); uic_init_one()
270 mtdcr(uic->dcrbase + UIC_SR, 0xffffffff); uic_init_one()
272 printk ("UIC%d (%d IRQ sources) at DCR 0x%x\n", uic->index, uic_init_one()
273 NR_UIC_INTS, uic->dcrbase); uic_init_one()
275 return uic; uic_init_one()
281 struct uic *uic; uic_init_tree() local
285 for_each_compatible_node(np, NULL, "ibm,uic") { uic_init_tree()
301 for_each_compatible_node(np, NULL, "ibm,uic") { uic_init_tree()
307 uic = uic_init_one(np); uic_init_tree()
308 if (! uic) uic_init_tree()
314 irq_set_handler_data(cascade_virq, uic); uic_init_tree()
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