Searched refs:uart_sel (Results 1 - 7 of 7) sorted by relevance
| /linux-4.4.14/drivers/clk/imx/ |
| H A D | clk-imx35.c | 70 arm_per_div, ahb_per_div, ipg_per, uart_sel, uart_div, esdhc_sel, enumerator in enum:mx35_clks
149 clk[uart_sel] = imx_clk_mux("uart_sel", base + MX35_CCM_PDR3, 14, 1, std_sel, ARRAY_SIZE(std_sel)); _mx35_clocks_init()
150 clk[uart_div] = imx_clk_divider("uart_div", "uart_sel", base + MX35_CCM_PDR4, 10, 6); _mx35_clocks_init()
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| H A D | clk-imx51-imx53.c | 177 clk[IMX5_CLK_UART_SEL] = imx_clk_mux("uart_sel", MXC_CCM_CSCMR1, 24, 2, mx5_clocks_common_init()
179 clk[IMX5_CLK_UART_PRED] = imx_clk_divider("uart_pred", "uart_sel", MXC_CCM_CSCDR1, 3, 3); mx5_clocks_common_init()
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| H A D | clk-imx6sl.c | 326 clks[IMX6SL_CLK_UART_SEL] = imx_clk_mux("uart_sel", base + 0x24, 6, 1, uart_sels, ARRAY_SIZE(uart_sels)); imx6sl_clocks_init()
365 clks[IMX6SL_CLK_UART_ROOT] = imx_clk_divider("uart_root", "uart_sel", base + 0x24, 0, 6); imx6sl_clocks_init()
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| H A D | clk-imx6ul.c | 241 clks[IMX6UL_CLK_UART_SEL] = imx_clk_mux("uart_sel", base + 0x24, 6, 1, uart_sels, ARRAY_SIZE(uart_sels)); imx6ul_clocks_init()
274 clks[IMX6UL_CLK_UART_PODF] = imx_clk_divider("uart_podf", "uart_sel", base + 0x24, 0, 6); imx6ul_clocks_init()
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| H A D | clk-imx6sx.c | 300 clks[IMX6SX_CLK_UART_SEL] = imx_clk_mux("uart_sel", base + 0x24, 6, 1, uart_sels, ARRAY_SIZE(uart_sels)); imx6sx_clocks_init()
341 clks[IMX6SX_CLK_UART_PODF] = imx_clk_divider("uart_podf", "uart_sel", base + 0x24, 0, 6); imx6sx_clocks_init()
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| /linux-4.4.14/drivers/clk/mediatek/ |
| H A D | clk-mt8135.c | 381 MUX_GATE(CLK_TOP_UART_SEL, "uart_sel", uart_parents, 0x0150, 24, 2, 31),
514 "uart_sel",
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| H A D | clk-mt8173.c | 542 MUX_GATE(CLK_TOP_UART_SEL, "uart_sel", uart_parents, 0x0060, 8, 1, 15),
706 "uart_sel",
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Completed in 414 milliseconds