Searched refs:rmh (Results 1 - 14 of 14) sorted by relevance

/linux-4.4.14/sound/pci/pcxhr/
H A Dpcxhr_hwdep.c45 struct pcxhr_rmh rmh; pcxhr_init_board() local
58 pcxhr_init_rmh(&rmh, CMD_SUPPORTED); pcxhr_init_board()
59 err = pcxhr_send_msg(mgr, &rmh); pcxhr_init_board()
63 if ((rmh.stat[0] & MASK_FIRST_FIELD) < mgr->playback_chips * 2) pcxhr_init_board()
66 if (((rmh.stat[0] >> (2 * FIELD_SIZE)) & MASK_FIRST_FIELD) < pcxhr_init_board()
70 if ((rmh.stat[1] & 0x5F) < card_streams) pcxhr_init_board()
73 if (((rmh.stat[1] >> 7) & 0x5F) < PCXHR_PLAYBACK_STREAMS) pcxhr_init_board()
77 rmh.stat[2], rmh.stat[3]); pcxhr_init_board()
79 pcxhr_init_rmh(&rmh, CMD_VERSION); pcxhr_init_board()
81 rmh.cmd[0] |= mgr->firmware_num; pcxhr_init_board()
83 rmh.cmd[1] = (1<<23) + mgr->granularity; pcxhr_init_board()
84 rmh.cmd_len = 2; pcxhr_init_board()
85 err = pcxhr_send_msg(mgr, &rmh); pcxhr_init_board()
89 "PCXHR DSP version is %d.%d.%d\n", (rmh.stat[0]>>16)&0xff, pcxhr_init_board()
90 (rmh.stat[0]>>8)&0xff, rmh.stat[0]&0xff); pcxhr_init_board()
91 mgr->dsp_version = rmh.stat[0]; pcxhr_init_board()
103 struct pcxhr_rmh rmh; pcxhr_sub_init() local
106 pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_READ); pcxhr_sub_init()
107 rmh.cmd[0] |= IO_NUM_REG_STATUS; pcxhr_sub_init()
108 rmh.cmd[1] = REG_STATUS_OPTIONS; pcxhr_sub_init()
109 rmh.cmd_len = 2; pcxhr_sub_init()
110 err = pcxhr_send_msg(mgr, &rmh); pcxhr_sub_init()
114 if ((rmh.stat[1] & REG_STATUS_OPT_DAUGHTER_MASK) == pcxhr_sub_init()
124 pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_READ); pcxhr_sub_init()
125 rmh.cmd[0] |= IO_NUM_REG_MUTE_OUT; pcxhr_sub_init()
127 rmh.cmd[1] = 1; /* unmute digital plugs */ pcxhr_sub_init()
128 rmh.cmd_len = 2; pcxhr_sub_init()
130 err = pcxhr_send_msg(mgr, &rmh); pcxhr_sub_init()
136 struct pcxhr_rmh rmh; pcxhr_reset_board() local
142 pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_WRITE); pcxhr_reset_board()
143 rmh.cmd[0] |= IO_NUM_REG_MUTE_OUT; pcxhr_reset_board()
144 pcxhr_send_msg(mgr, &rmh); pcxhr_reset_board()
172 struct pcxhr_rmh rmh; pcxhr_dsp_allocate_pipe() local
189 pcxhr_init_rmh(&rmh, CMD_RES_PIPE); pcxhr_dsp_allocate_pipe()
190 pcxhr_set_pipe_cmd_params(&rmh, is_capture, pin, pcxhr_dsp_allocate_pipe()
192 rmh.cmd[1] |= 0x020000; /* add P_PCM_ONLY_MASK */ pcxhr_dsp_allocate_pipe()
195 rmh.cmd[rmh.cmd_len++] = (audio_count == 1) ? 0x01 : 0x03; pcxhr_dsp_allocate_pipe()
197 err = pcxhr_send_msg(mgr, &rmh); pcxhr_dsp_allocate_pipe()
214 struct pcxhr_rmh rmh;
229 pcxhr_init_rmh(&rmh, CMD_FREE_PIPE);
230 pcxhr_set_pipe_cmd_params(&rmh, pipe->is_capture, pipe->first_audio,
232 err = pcxhr_send_msg(mgr, &rmh);
H A Dpcxhr.c252 struct pcxhr_rmh rmh; pcxhr_get_clock_reg() local
280 pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_WRITE); pcxhr_get_clock_reg()
281 rmh.cmd[0] |= IO_NUM_REG_GENCLK; pcxhr_get_clock_reg()
282 rmh.cmd[1] = pllreg & MASK_DSP_WORD; pcxhr_get_clock_reg()
283 rmh.cmd[2] = pllreg >> 24; pcxhr_get_clock_reg()
284 rmh.cmd_len = 3; pcxhr_get_clock_reg()
285 err = pcxhr_send_msg(mgr, &rmh); pcxhr_get_clock_reg()
326 struct pcxhr_rmh rmh; pcxhr_sub_set_clock() local
341 pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_WRITE); /* mute outputs */ pcxhr_sub_set_clock()
342 rmh.cmd[0] |= IO_NUM_REG_MUTE_OUT; pcxhr_sub_set_clock()
344 rmh.cmd[1] = 1; pcxhr_sub_set_clock()
345 rmh.cmd_len = 2; pcxhr_sub_set_clock()
347 err = pcxhr_send_msg(mgr, &rmh); pcxhr_sub_set_clock()
351 pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_WRITE); /* set speed ratio */ pcxhr_sub_set_clock()
352 rmh.cmd[0] |= IO_NUM_SPEED_RATIO; pcxhr_sub_set_clock()
353 rmh.cmd[1] = speed; pcxhr_sub_set_clock()
354 rmh.cmd_len = 2; pcxhr_sub_set_clock()
355 err = pcxhr_send_msg(mgr, &rmh); pcxhr_sub_set_clock()
371 pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_READ); /* unmute outputs */ pcxhr_sub_set_clock()
372 rmh.cmd[0] |= IO_NUM_REG_MUTE_OUT; pcxhr_sub_set_clock()
374 rmh.cmd[1] = 1; pcxhr_sub_set_clock()
375 rmh.cmd_len = 2; pcxhr_sub_set_clock()
377 err = pcxhr_send_msg(mgr, &rmh); pcxhr_sub_set_clock()
395 struct pcxhr_rmh rmh; pcxhr_set_clock() local
410 pcxhr_init_rmh(&rmh, CMD_MODIFY_CLOCK); pcxhr_set_clock()
411 rmh.cmd[0] |= PCXHR_MODIFY_CLOCK_S_BIT; /* resync fifos */ pcxhr_set_clock()
413 rmh.cmd[1] = PCXHR_IRQ_TIMER_PERIOD; pcxhr_set_clock()
415 rmh.cmd[1] = PCXHR_IRQ_TIMER_PERIOD * 2; pcxhr_set_clock()
416 rmh.cmd[2] = rate; pcxhr_set_clock()
417 rmh.cmd_len = 3; pcxhr_set_clock()
418 err = pcxhr_send_msg(mgr, &rmh); pcxhr_set_clock()
430 struct pcxhr_rmh rmh; pcxhr_sub_get_external_clock() local
456 pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_READ); pcxhr_sub_get_external_clock()
457 rmh.cmd_len = 2; pcxhr_sub_get_external_clock()
458 rmh.cmd[0] |= IO_NUM_REG_STATUS; pcxhr_sub_get_external_clock()
460 rmh.cmd[1] = reg; pcxhr_sub_get_external_clock()
461 err = pcxhr_send_msg(mgr, &rmh); pcxhr_sub_get_external_clock()
467 rmh.cmd[1] = REG_STATUS_CURRENT; pcxhr_sub_get_external_clock()
468 err = pcxhr_send_msg(mgr, &rmh); pcxhr_sub_get_external_clock()
471 switch (rmh.stat[1] & 0x0f) { pcxhr_sub_get_external_clock()
508 struct pcxhr_rmh rmh; pcxhr_set_stream_state() local
532 pcxhr_init_rmh(&rmh, start ? CMD_START_STREAM : CMD_STOP_STREAM); pcxhr_set_stream_state()
533 pcxhr_set_pipe_cmd_params(&rmh, stream->pipe->is_capture, pcxhr_set_stream_state()
538 err = pcxhr_send_msg(chip->mgr, &rmh); pcxhr_set_stream_state()
560 struct pcxhr_rmh rmh; pcxhr_set_format() local
604 pcxhr_init_rmh(&rmh, is_capture ? pcxhr_set_format()
606 pcxhr_set_pipe_cmd_params(&rmh, is_capture, stream->pipe->first_audio, pcxhr_set_format()
612 rmh.cmd[0] |= 1<<10; pcxhr_set_format()
614 rmh.cmd[0] |= 1<<12; pcxhr_set_format()
616 rmh.cmd[1] = 0; pcxhr_set_format()
617 rmh.cmd_len = 2; pcxhr_set_format()
620 rmh.cmd[1] = stream->channels; pcxhr_set_format()
623 rmh.cmd[2] = (stream->channels == 1) ? 0x01 : 0x03; pcxhr_set_format()
624 rmh.cmd_len = 3; pcxhr_set_format()
627 rmh.cmd[rmh.cmd_len++] = header >> 8; pcxhr_set_format()
628 rmh.cmd[rmh.cmd_len++] = (header & 0xff) << 16; pcxhr_set_format()
629 err = pcxhr_send_msg(chip->mgr, &rmh); pcxhr_set_format()
639 struct pcxhr_rmh rmh; pcxhr_update_r_buffer() local
652 pcxhr_init_rmh(&rmh, CMD_UPDATE_R_BUFFERS); pcxhr_update_r_buffer()
653 pcxhr_set_pipe_cmd_params(&rmh, is_capture, stream->pipe->first_audio, pcxhr_update_r_buffer()
659 rmh.cmd[1] = subs->runtime->dma_bytes * 8; pcxhr_update_r_buffer()
661 rmh.cmd[2] = subs->runtime->dma_addr >> 24; pcxhr_update_r_buffer()
663 rmh.cmd[2] |= 1<<19; pcxhr_update_r_buffer()
665 rmh.cmd[3] = subs->runtime->dma_addr & MASK_DSP_WORD; pcxhr_update_r_buffer()
666 rmh.cmd_len = 4; pcxhr_update_r_buffer()
667 err = pcxhr_send_msg(chip->mgr, &rmh); pcxhr_update_r_buffer()
679 struct pcxhr_rmh rmh;
682 pcxhr_init_rmh(&rmh, CMD_PIPE_SAMPLE_COUNT);
683 pcxhr_set_pipe_cmd_params(&rmh, stream->pipe->is_capture, 0, 0,
685 err = pcxhr_send_msg(chip->mgr, &rmh);
687 *sample_count = ((snd_pcm_uframes_t)rmh.stat[0]) << 24;
688 *sample_count += (snd_pcm_uframes_t)rmh.stat[1];
895 struct pcxhr_rmh rmh; pcxhr_hardware_timer() local
898 pcxhr_init_rmh(&rmh, CMD_SET_TIMER_INTERRUPT); pcxhr_hardware_timer()
902 rmh.cmd[0] |= mgr->granularity; pcxhr_hardware_timer()
904 err = pcxhr_send_msg(mgr, &rmh); pcxhr_hardware_timer()
1259 struct pcxhr_rmh rmh; pcxhr_proc_info() local
1273 pcxhr_init_rmh(&rmh, CMD_GET_DSP_RESOURCES); pcxhr_proc_info()
1274 if( ! pcxhr_send_msg(mgr, &rmh) ) { pcxhr_proc_info()
1275 int cur = rmh.stat[0]; pcxhr_proc_info()
1276 int ref = rmh.stat[1]; pcxhr_proc_info()
1289 rmh.stat[2], rmh.stat[3]); pcxhr_proc_info()
1303 rmh.cmd[0] = 0x4200 + PCXHR_SIZE_MAX_STATUS; pcxhr_proc_info()
1304 rmh.cmd_len = 1; pcxhr_proc_info()
1305 rmh.stat_len = PCXHR_SIZE_MAX_STATUS; pcxhr_proc_info()
1306 rmh.dsp_stat = 0; pcxhr_proc_info()
1307 rmh.cmd_idx = CMD_LAST_INDEX; pcxhr_proc_info()
1308 if( ! pcxhr_send_msg(mgr, &rmh) ) { pcxhr_proc_info()
1310 if (rmh.stat_len > 8) pcxhr_proc_info()
1311 rmh.stat_len = 8; pcxhr_proc_info()
1312 for (i = 0; i < rmh.stat_len; i++) pcxhr_proc_info()
1314 i, rmh.stat[i]); pcxhr_proc_info()
1412 struct pcxhr_rmh rmh; pcxhr_proc_ltc() local
1421 pcxhr_init_rmh(&rmh, CMD_MANAGE_SIGNAL); pcxhr_proc_ltc()
1422 rmh.cmd[0] |= MANAGE_SIGNAL_TIME_CODE; pcxhr_proc_ltc()
1423 err = pcxhr_send_msg(mgr, &rmh); pcxhr_proc_ltc()
1435 pcxhr_init_rmh(&rmh, CMD_GET_TIME_CODE); pcxhr_proc_ltc()
1436 err = pcxhr_send_msg(mgr, &rmh); pcxhr_proc_ltc()
1441 ltcHrs = 10*((rmh.stat[0] >> 8) & 0x3) + (rmh.stat[0] & 0xf); pcxhr_proc_ltc()
1442 ltcMin = 10*((rmh.stat[1] >> 16) & 0x7) + ((rmh.stat[1] >> 8) & 0xf); pcxhr_proc_ltc()
1443 ltcSec = 10*(rmh.stat[1] & 0x7) + ((rmh.stat[2] >> 16) & 0xf); pcxhr_proc_ltc()
1444 ltcFrm = 10*((rmh.stat[2] >> 8) & 0x3) + (rmh.stat[2] & 0xf); pcxhr_proc_ltc()
1448 snd_iprintf(buffer, "raw: 0x%04x%06x%06x\n", rmh.stat[0] & 0x00ffff, pcxhr_proc_ltc()
1449 rmh.stat[1] & 0xffffff, rmh.stat[2] & 0xffffff); pcxhr_proc_ltc()
1451 rmh.stat[3] & 0xffffff, rmh.stat[4] & 0xffffff);*/ pcxhr_proc_ltc()
1452 if (!(rmh.stat[0] & TIME_CODE_VALID_MASK)) { pcxhr_proc_ltc()
H A Dpcxhr_core.c545 static int pcxhr_read_rmh_status(struct pcxhr_mgr *mgr, struct pcxhr_rmh *rmh) pcxhr_read_rmh_status() argument
554 if (rmh->stat_len < PCXHR_SIZE_MAX_STATUS) pcxhr_read_rmh_status()
556 else max_stat_len = rmh->stat_len; pcxhr_read_rmh_status()
558 for (i = 0; i < rmh->stat_len; i++) { pcxhr_read_rmh_status()
575 /* need to update rmh->stat_len on the fly ?? */ pcxhr_read_rmh_status()
577 if (rmh->dsp_stat != RMH_SSIZE_FIXED) { pcxhr_read_rmh_status()
578 if (rmh->dsp_stat == RMH_SSIZE_ARG) { pcxhr_read_rmh_status()
579 rmh->stat_len = (data & 0x0000ff) + 1; pcxhr_read_rmh_status()
582 /* rmh->dsp_stat == RMH_SSIZE_MASK */ pcxhr_read_rmh_status()
583 rmh->stat_len = 1; pcxhr_read_rmh_status()
587 rmh->stat_len++; pcxhr_read_rmh_status()
594 if (rmh->cmd_idx < CMD_LAST_INDEX) pcxhr_read_rmh_status()
598 rmh->stat[i] = data; pcxhr_read_rmh_status()
600 if (rmh->stat_len > max_stat_len) { pcxhr_read_rmh_status()
601 dev_dbg(&mgr->pci->dev, "PCXHR : rmh->stat_len=%x too big\n", pcxhr_read_rmh_status()
602 rmh->stat_len); pcxhr_read_rmh_status()
603 rmh->stat_len = max_stat_len; pcxhr_read_rmh_status()
608 static int pcxhr_send_msg_nolock(struct pcxhr_mgr *mgr, struct pcxhr_rmh *rmh) pcxhr_send_msg_nolock() argument
615 if (snd_BUG_ON(rmh->cmd_len >= PCXHR_SIZE_MAX_CMD)) pcxhr_send_msg_nolock()
638 data = rmh->cmd[0]; pcxhr_send_msg_nolock()
640 if (rmh->cmd_len > 1) pcxhr_send_msg_nolock()
645 if (rmh->cmd_idx < CMD_LAST_INDEX) pcxhr_send_msg_nolock()
647 data, cmd_names[rmh->cmd_idx]); pcxhr_send_msg_nolock()
658 if (rmh->cmd_len > 1) { pcxhr_send_msg_nolock()
660 data = rmh->cmd_len - 1; pcxhr_send_msg_nolock()
671 for (i=1; i < rmh->cmd_len; i++) { pcxhr_send_msg_nolock()
673 data = rmh->cmd[i]; pcxhr_send_msg_nolock()
675 if (rmh->cmd_idx < CMD_LAST_INDEX) pcxhr_send_msg_nolock()
712 rmh->cmd_idx, data); pcxhr_send_msg_nolock()
716 err = pcxhr_read_rmh_status(mgr, rmh); pcxhr_send_msg_nolock()
727 * @rmh: the rmh pointer to be initialized
728 * @cmd: the rmh command to be set
730 void pcxhr_init_rmh(struct pcxhr_rmh *rmh, int cmd) pcxhr_init_rmh() argument
734 rmh->cmd[0] = pcxhr_dsp_cmds[cmd].opcode; pcxhr_init_rmh()
735 rmh->cmd_len = 1; pcxhr_init_rmh()
736 rmh->stat_len = pcxhr_dsp_cmds[cmd].st_length; pcxhr_init_rmh()
737 rmh->dsp_stat = pcxhr_dsp_cmds[cmd].st_type; pcxhr_init_rmh()
738 rmh->cmd_idx = cmd; pcxhr_init_rmh()
742 void pcxhr_set_pipe_cmd_params(struct pcxhr_rmh *rmh, int capture, pcxhr_set_pipe_cmd_params() argument
748 rmh->cmd[0] |= 0x800; /* COMMAND_RECORD_MASK */ pcxhr_set_pipe_cmd_params()
750 rmh->cmd[0] |= (param1 << FIELD_SIZE); pcxhr_set_pipe_cmd_params()
753 rmh->cmd[0] |= param2; pcxhr_set_pipe_cmd_params()
757 rmh->cmd[1] = param3; pcxhr_set_pipe_cmd_params()
758 rmh->cmd_len = 2; pcxhr_set_pipe_cmd_params()
764 * @rmh: the rmh record to send and receive
768 int pcxhr_send_msg(struct pcxhr_mgr *mgr, struct pcxhr_rmh *rmh) pcxhr_send_msg() argument
773 err = pcxhr_send_msg_nolock(mgr, rmh); pcxhr_send_msg()
797 struct pcxhr_rmh rmh; pcxhr_prepair_pipe_start() local
804 pcxhr_init_rmh(&rmh, CMD_CAN_START_PIPE); pcxhr_prepair_pipe_start()
807 pcxhr_set_pipe_cmd_params(&rmh, 0, audio, 0, 0); pcxhr_prepair_pipe_start()
810 pcxhr_set_pipe_cmd_params(&rmh, 1, audio - pcxhr_prepair_pipe_start()
814 err = pcxhr_send_msg(mgr, &rmh); pcxhr_prepair_pipe_start()
825 if (rmh.stat[0] == 0) pcxhr_prepair_pipe_start()
836 struct pcxhr_rmh rmh; pcxhr_stop_pipes() local
842 pcxhr_init_rmh(&rmh, CMD_STOP_PIPE); pcxhr_stop_pipes()
845 pcxhr_set_pipe_cmd_params(&rmh, 0, audio, 0, 0); pcxhr_stop_pipes()
848 pcxhr_set_pipe_cmd_params(&rmh, 1, audio - pcxhr_stop_pipes()
852 err = pcxhr_send_msg(mgr, &rmh); pcxhr_stop_pipes()
868 struct pcxhr_rmh rmh; pcxhr_toggle_pipes() local
874 pcxhr_init_rmh(&rmh, CMD_CONF_PIPE); pcxhr_toggle_pipes()
876 pcxhr_set_pipe_cmd_params(&rmh, 0, 0, 0, pcxhr_toggle_pipes()
879 pcxhr_set_pipe_cmd_params(&rmh, 1, 0, 0, pcxhr_toggle_pipes()
881 err = pcxhr_send_msg(mgr, &rmh); pcxhr_toggle_pipes()
893 pcxhr_init_rmh(&rmh, CMD_SEND_IRQA); pcxhr_toggle_pipes()
894 err = pcxhr_send_msg(mgr, &rmh); pcxhr_toggle_pipes()
975 struct pcxhr_rmh rmh; pcxhr_write_io_num_reg_cont() local
988 pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_WRITE); pcxhr_write_io_num_reg_cont()
989 rmh.cmd[0] |= IO_NUM_REG_CONT; pcxhr_write_io_num_reg_cont()
990 rmh.cmd[1] = mask; pcxhr_write_io_num_reg_cont()
991 rmh.cmd[2] = value; pcxhr_write_io_num_reg_cont()
992 rmh.cmd_len = 3; pcxhr_write_io_num_reg_cont()
993 err = pcxhr_send_msg_nolock(mgr, &rmh); pcxhr_write_io_num_reg_cont()
1132 struct pcxhr_rmh rmh; pcxhr_stream_read_position() local
1138 pcxhr_init_rmh(&rmh, CMD_STREAM_SAMPLE_COUNT); pcxhr_stream_read_position()
1139 pcxhr_set_pipe_cmd_params(&rmh, stream->pipe->is_capture, pcxhr_stream_read_position()
1141 /* rmh.stat_len = 2; */ /* 2 resp data for each stream of the pipe */ pcxhr_stream_read_position()
1143 err = pcxhr_send_msg(mgr, &rmh); pcxhr_stream_read_position()
1147 hw_sample_count = ((u_int64_t)rmh.stat[0]) << 24; pcxhr_stream_read_position()
1148 hw_sample_count += (u_int64_t)rmh.stat[1]; pcxhr_stream_read_position()
H A Dpcxhr_mixer.c56 struct pcxhr_rmh rmh; pcxhr_update_analog_audio_level() local
58 pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_WRITE); pcxhr_update_analog_audio_level()
60 rmh.cmd[0] |= IO_NUM_REG_IN_ANA_LEVEL; pcxhr_update_analog_audio_level()
61 rmh.cmd[2] = chip->analog_capture_volume[channel]; pcxhr_update_analog_audio_level()
63 rmh.cmd[0] |= IO_NUM_REG_OUT_ANA_LEVEL; pcxhr_update_analog_audio_level()
69 rmh.cmd[2] = PCXHR_LINE_PLAYBACK_LEVEL_MAX - vol; pcxhr_update_analog_audio_level()
71 rmh.cmd[1] = 1 << ((2 * chip->chip_idx) + channel); /* audio mask */ pcxhr_update_analog_audio_level()
72 rmh.cmd_len = 3; pcxhr_update_analog_audio_level()
73 err = pcxhr_send_msg(chip->mgr, &rmh); pcxhr_update_analog_audio_level()
262 struct pcxhr_rmh rmh; pcxhr_update_playback_stream_level() local
275 pcxhr_init_rmh(&rmh, CMD_STREAM_OUT_LEVEL_ADJUST); pcxhr_update_playback_stream_level()
277 pcxhr_set_pipe_cmd_params(&rmh, 0, pipe->first_audio, 0, 1<<idx); pcxhr_update_playback_stream_level()
279 rmh.cmd[0] |= MORE_THAN_ONE_STREAM_LEVEL; pcxhr_update_playback_stream_level()
280 rmh.cmd[2] = VALID_STREAM_PAN_LEVEL_MASK | VALID_STREAM_LEVEL_1_MASK; pcxhr_update_playback_stream_level()
281 rmh.cmd[2] |= (left << 10); pcxhr_update_playback_stream_level()
282 rmh.cmd[3] = VALID_STREAM_PAN_LEVEL_MASK | VALID_STREAM_LEVEL_2_MASK; pcxhr_update_playback_stream_level()
283 rmh.cmd[3] |= right; pcxhr_update_playback_stream_level()
284 rmh.cmd_len = 4; pcxhr_update_playback_stream_level()
286 err = pcxhr_send_msg(chip->mgr, &rmh); pcxhr_update_playback_stream_level()
306 struct pcxhr_rmh rmh; pcxhr_update_audio_pipe_level() local
314 pcxhr_init_rmh(&rmh, CMD_AUDIO_LEVEL_ADJUST); pcxhr_update_audio_pipe_level()
316 pcxhr_set_pipe_cmd_params(&rmh, capture, 0, 0, pcxhr_update_audio_pipe_level()
321 rmh.cmd[0] |= VALID_AUDIO_IO_DIGITAL_LEVEL; pcxhr_update_audio_pipe_level()
324 rmh.cmd[2] = chip->digital_capture_volume[channel]; pcxhr_update_audio_pipe_level()
326 rmh.cmd[0] |= VALID_AUDIO_IO_MONITOR_LEVEL | pcxhr_update_audio_pipe_level()
331 rmh.cmd[2] = chip->monitoring_volume[channel] << 10; pcxhr_update_audio_pipe_level()
333 rmh.cmd[2] |= AUDIO_IO_HAS_MUTE_MONITOR_1; pcxhr_update_audio_pipe_level()
335 rmh.cmd_len = 3; pcxhr_update_audio_pipe_level()
337 err = pcxhr_send_msg(chip->mgr, &rmh); pcxhr_update_audio_pipe_level()
586 struct pcxhr_rmh rmh; pcxhr_set_audio_source() local
607 pcxhr_init_rmh(&rmh, CMD_RESYNC_AUDIO_INPUTS); pcxhr_set_audio_source()
608 rmh.cmd[0] |= (1 << chip->chip_idx); pcxhr_set_audio_source()
609 err = pcxhr_send_msg(chip->mgr, &rmh); pcxhr_set_audio_source()
622 pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_WRITE); pcxhr_set_audio_source()
623 rmh.cmd_len = 2; pcxhr_set_audio_source()
624 rmh.cmd[0] |= IO_NUM_REG_CONFIG_SRC; pcxhr_set_audio_source()
625 rmh.cmd[1] = src_config; pcxhr_set_audio_source()
626 err = pcxhr_send_msg(chip->mgr, &rmh); pcxhr_set_audio_source()
632 pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_WRITE); pcxhr_set_audio_source()
633 rmh.cmd_len = 3; pcxhr_set_audio_source()
634 rmh.cmd[0] |= IO_NUM_UER_CHIP_REG; pcxhr_set_audio_source()
635 rmh.cmd[1] = codec; pcxhr_set_audio_source()
636 rmh.cmd[2] = ((CS8420_DATA_FLOW_CTL & CHIP_SIG_AND_MAP_SPI) | pcxhr_set_audio_source()
638 err = pcxhr_send_msg(chip->mgr, &rmh); pcxhr_set_audio_source()
641 rmh.cmd[2] = ((CS8420_CLOCK_SRC_CTL & CHIP_SIG_AND_MAP_SPI) | pcxhr_set_audio_source()
643 err = pcxhr_send_msg(chip->mgr, &rmh); pcxhr_set_audio_source()
869 struct pcxhr_rmh rmh; pcxhr_iec958_capture_byte() local
871 pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_READ); pcxhr_iec958_capture_byte()
872 rmh.cmd[0] |= IO_NUM_UER_CHIP_REG; pcxhr_iec958_capture_byte()
875 case 0: rmh.cmd[1] = CS8420_01_CS; break; pcxhr_iec958_capture_byte()
876 case 1: rmh.cmd[1] = CS8420_23_CS; break; pcxhr_iec958_capture_byte()
877 case 2: rmh.cmd[1] = CS8420_45_CS; break; pcxhr_iec958_capture_byte()
878 case 3: rmh.cmd[1] = CS8420_67_CS; break; pcxhr_iec958_capture_byte()
883 case 0: rmh.cmd[2] = CS8416_CSB0; break; pcxhr_iec958_capture_byte()
884 case 1: rmh.cmd[2] = CS8416_CSB1; break; pcxhr_iec958_capture_byte()
885 case 2: rmh.cmd[2] = CS8416_CSB2; break; pcxhr_iec958_capture_byte()
886 case 3: rmh.cmd[2] = CS8416_CSB3; break; pcxhr_iec958_capture_byte()
887 case 4: rmh.cmd[2] = CS8416_CSB4; break; pcxhr_iec958_capture_byte()
893 case 0: rmh.cmd[2] = CS8420_CSB0; break; pcxhr_iec958_capture_byte()
894 case 1: rmh.cmd[2] = CS8420_CSB1; break; pcxhr_iec958_capture_byte()
895 case 2: rmh.cmd[2] = CS8420_CSB2; break; pcxhr_iec958_capture_byte()
896 case 3: rmh.cmd[2] = CS8420_CSB3; break; pcxhr_iec958_capture_byte()
897 case 4: rmh.cmd[2] = CS8420_CSB4; break; pcxhr_iec958_capture_byte()
902 rmh.cmd[1] &= 0x0fffff; pcxhr_iec958_capture_byte()
904 rmh.cmd[2] &= CHIP_SIG_AND_MAP_SPI; pcxhr_iec958_capture_byte()
905 rmh.cmd_len = 3; pcxhr_iec958_capture_byte()
906 err = pcxhr_send_msg(chip->mgr, &rmh); pcxhr_iec958_capture_byte()
911 temp = (unsigned char)rmh.stat[1]; pcxhr_iec958_capture_byte()
917 if (rmh.stat[1] & (1 << i)) pcxhr_iec958_capture_byte()
969 struct pcxhr_rmh rmh; pcxhr_iec958_update_byte() local
979 pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_WRITE); pcxhr_iec958_update_byte()
980 rmh.cmd[0] |= IO_NUM_REG_CUER; pcxhr_iec958_update_byte()
981 rmh.cmd[1] = cmd; pcxhr_iec958_update_byte()
982 rmh.cmd_len = 2; pcxhr_iec958_update_byte()
986 err = pcxhr_send_msg(chip->mgr, &rmh); pcxhr_iec958_update_byte()
H A Dpcxhr_core.h94 init the rmh struct; by default cmd_len is set to 1
96 void pcxhr_init_rmh(struct pcxhr_rmh *rmh, int cmd);
98 void pcxhr_set_pipe_cmd_params(struct pcxhr_rmh* rmh, int capture, unsigned int param1,
104 send the rmh
106 int pcxhr_send_msg(struct pcxhr_mgr *mgr, struct pcxhr_rmh *rmh);
/linux-4.4.14/sound/pci/lx6464es/
H A Dlx_core.c145 /* rmh */
223 static void lx_message_init(struct lx_rmh *rmh, enum cmd_mb_opcodes cmd) lx_message_init() argument
227 rmh->cmd[0] = dsp_commands[cmd].dcCodeOp; lx_message_init()
228 rmh->cmd_len = dsp_commands[cmd].dcCmdLength; lx_message_init()
229 rmh->stat_len = dsp_commands[cmd].dcStatusLength; lx_message_init()
230 rmh->dsp_stat = dsp_commands[cmd].dcStatusType; lx_message_init()
231 rmh->cmd_idx = cmd; lx_message_init()
232 memset(&rmh->cmd[1], 0, (REG_CRM_NUMBER - 1) * sizeof(u32)); lx_message_init()
235 memset(rmh->stat, 0, REG_CRM_NUMBER * sizeof(u32)); lx_message_init()
238 rmh->cmd_idx = cmd; lx_message_init()
243 #define LXRMH "lx6464es rmh: " lx_message_dump()
244 static void lx_message_dump(struct lx_rmh *rmh) lx_message_dump() argument
246 u8 idx = rmh->cmd_idx; lx_message_dump()
251 for (i = 0; i != rmh->cmd_len; ++i) lx_message_dump()
252 snd_printk(LXRMH "\tcmd[%d] %08x\n", i, rmh->cmd[i]); lx_message_dump()
254 for (i = 0; i != rmh->stat_len; ++i) lx_message_dump()
255 snd_printk(LXRMH "\tstat[%d]: %08x\n", i, rmh->stat[i]); lx_message_dump()
259 static inline void lx_message_dump(struct lx_rmh *rmh) lx_message_dump() argument
271 static int lx_message_send_atomic(struct lx6464es *chip, struct lx_rmh *rmh) lx_message_send_atomic() argument
282 lx_dsp_reg_writebuf(chip, eReg_CRM1, rmh->cmd, rmh->cmd_len); lx_message_send_atomic()
290 if (rmh->dsp_stat == 0) lx_message_send_atomic()
304 if (rmh->stat_len) { lx_message_send_atomic()
305 snd_BUG_ON(rmh->stat_len >= (REG_CRM_NUMBER-1)); lx_message_send_atomic()
306 lx_dsp_reg_readbuf(chip, eReg_CRM2, rmh->stat, lx_message_send_atomic()
307 rmh->stat_len); lx_message_send_atomic()
310 dev_err(chip->card->dev, "rmh error: %08x\n", reg); lx_message_send_atomic()
325 lx_message_dump(rmh); lx_message_send_atomic()
338 lx_message_init(&chip->rmh, CMD_01_GET_SYS_CFG); lx_dsp_get_version()
339 ret = lx_message_send_atomic(chip, &chip->rmh); lx_dsp_get_version()
341 *rdsp_version = chip->rmh.stat[1]; lx_dsp_get_version()
355 lx_message_init(&chip->rmh, CMD_01_GET_SYS_CFG); lx_dsp_get_clock_frequency()
356 ret = lx_message_send_atomic(chip, &chip->rmh); lx_dsp_get_clock_frequency()
359 freq_raw = chip->rmh.stat[0] >> FREQ_FIELD_OFFSET; lx_dsp_get_clock_frequency()
403 lx_message_init(&chip->rmh, CMD_02_SET_GRANULARITY); lx_dsp_set_granularity()
404 chip->rmh.cmd[0] |= gran; lx_dsp_set_granularity()
406 ret = lx_message_send_atomic(chip, &chip->rmh); lx_dsp_set_granularity()
417 lx_message_init(&chip->rmh, CMD_04_GET_EVENT); lx_dsp_read_async_events()
418 chip->rmh.stat_len = 9; /* we don't necessarily need the full length */ lx_dsp_read_async_events()
420 ret = lx_message_send_atomic(chip, &chip->rmh); lx_dsp_read_async_events()
423 memcpy(data, chip->rmh.stat, chip->rmh.stat_len * sizeof(u32)); lx_dsp_read_async_events()
442 lx_message_init(&chip->rmh, CMD_06_ALLOCATE_PIPE); lx_pipe_allocate()
444 chip->rmh.cmd[0] |= pipe_cmd; lx_pipe_allocate()
445 chip->rmh.cmd[0] |= channels; lx_pipe_allocate()
447 err = lx_message_send_atomic(chip, &chip->rmh); lx_pipe_allocate()
462 lx_message_init(&chip->rmh, CMD_07_RELEASE_PIPE); lx_pipe_release()
464 chip->rmh.cmd[0] |= pipe_cmd; lx_pipe_release()
466 err = lx_message_send_atomic(chip, &chip->rmh); lx_pipe_release()
487 lx_message_init(&chip->rmh, CMD_08_ASK_BUFFERS); lx_buffer_ask()
489 chip->rmh.cmd[0] |= pipe_cmd; lx_buffer_ask()
491 err = lx_message_send_atomic(chip, &chip->rmh); lx_buffer_ask()
496 u32 stat = chip->rmh.stat[i]; lx_buffer_ask()
512 for (i = 0; i != chip->rmh.stat_len; ++i) lx_buffer_ask()
515 chip->rmh.stat[i], lx_buffer_ask()
516 chip->rmh.stat[i] & MASK_DATA_SIZE); lx_buffer_ask()
531 lx_message_init(&chip->rmh, CMD_09_STOP_PIPE); lx_pipe_stop()
533 chip->rmh.cmd[0] |= pipe_cmd; lx_pipe_stop()
535 err = lx_message_send_atomic(chip, &chip->rmh); lx_pipe_stop()
547 lx_message_init(&chip->rmh, CMD_0B_TOGGLE_PIPE_STATE); lx_pipe_toggle_state()
549 chip->rmh.cmd[0] |= pipe_cmd; lx_pipe_toggle_state()
551 err = lx_message_send_atomic(chip, &chip->rmh); lx_pipe_toggle_state()
592 lx_message_init(&chip->rmh, CMD_0A_GET_PIPE_SPL_COUNT); lx_pipe_sample_count()
594 chip->rmh.cmd[0] |= pipe_cmd; lx_pipe_sample_count()
595 chip->rmh.stat_len = 2; /* need all words here! */ lx_pipe_sample_count()
597 err = lx_message_send_atomic(chip, &chip->rmh); /* don't sleep! */ lx_pipe_sample_count()
603 *rsample_count = ((u64)(chip->rmh.stat[0] & MASK_SPL_COUNT_HI) lx_pipe_sample_count()
605 + chip->rmh.stat[1]; /* lo part */ lx_pipe_sample_count()
618 lx_message_init(&chip->rmh, CMD_0A_GET_PIPE_SPL_COUNT); lx_pipe_state()
620 chip->rmh.cmd[0] |= pipe_cmd; lx_pipe_state()
622 err = lx_message_send_atomic(chip, &chip->rmh); lx_pipe_state()
627 *rstate = (chip->rmh.stat[0] >> PSTATE_OFFSET) & 0x0F; lx_pipe_state()
674 lx_message_init(&chip->rmh, CMD_13_SET_STREAM_STATE); lx_stream_set_state()
676 chip->rmh.cmd[0] |= pipe_cmd; lx_stream_set_state()
677 chip->rmh.cmd[0] |= state; lx_stream_set_state()
679 err = lx_message_send_atomic(chip, &chip->rmh); lx_stream_set_state()
697 lx_message_init(&chip->rmh, CMD_0C_DEF_STREAM); lx_stream_set_format()
699 chip->rmh.cmd[0] |= pipe_cmd; lx_stream_set_format()
703 chip->rmh.cmd[0] |= (STREAM_FMT_16b << STREAM_FMT_OFFSET); lx_stream_set_format()
707 chip->rmh.cmd[0] |= (STREAM_FMT_intel << STREAM_FMT_OFFSET); lx_stream_set_format()
709 chip->rmh.cmd[0] |= channels-1; lx_stream_set_format()
711 err = lx_message_send_atomic(chip, &chip->rmh); lx_stream_set_format()
724 lx_message_init(&chip->rmh, CMD_0E_GET_STREAM_SPL_COUNT); lx_stream_state()
726 chip->rmh.cmd[0] |= pipe_cmd; lx_stream_state()
728 err = lx_message_send_atomic(chip, &chip->rmh); lx_stream_state()
730 *rstate = (chip->rmh.stat[0] & SF_START) ? START_STATE : PAUSE_STATE; lx_stream_state()
743 lx_message_init(&chip->rmh, CMD_0E_GET_STREAM_SPL_COUNT); lx_stream_sample_position()
745 chip->rmh.cmd[0] |= pipe_cmd; lx_stream_sample_position()
747 err = lx_message_send_atomic(chip, &chip->rmh); lx_stream_sample_position()
749 *r_bytepos = ((u64) (chip->rmh.stat[0] & MASK_SPL_COUNT_HI) lx_stream_sample_position()
751 + chip->rmh.stat[1]; /* lo part */ lx_stream_sample_position()
766 lx_message_init(&chip->rmh, CMD_0F_UPDATE_BUFFER); lx_buffer_give()
768 chip->rmh.cmd[0] |= pipe_cmd; lx_buffer_give()
769 chip->rmh.cmd[0] |= BF_NOTIFY_EOB; /* request interrupt notification */ lx_buffer_give()
773 chip->rmh.cmd[1] = buffer_size & MASK_DATA_SIZE; lx_buffer_give()
774 chip->rmh.cmd[2] = buf_address_lo; lx_buffer_give()
777 chip->rmh.cmd_len = 4; lx_buffer_give()
778 chip->rmh.cmd[3] = buf_address_hi; lx_buffer_give()
779 chip->rmh.cmd[0] |= BF_64BITS_ADR; lx_buffer_give()
782 err = lx_message_send_atomic(chip, &chip->rmh); lx_buffer_give()
785 *r_buffer_index = chip->rmh.stat[0]; lx_buffer_give()
813 lx_message_init(&chip->rmh, CMD_11_CANCEL_BUFFER); lx_buffer_free()
815 chip->rmh.cmd[0] |= pipe_cmd; lx_buffer_free()
816 chip->rmh.cmd[0] |= MASK_BUFFER_ID; /* ask for the current buffer: the lx_buffer_free()
819 err = lx_message_send_atomic(chip, &chip->rmh); lx_buffer_free()
822 *r_buffer_size = chip->rmh.stat[0] & MASK_DATA_SIZE; lx_buffer_free()
835 lx_message_init(&chip->rmh, CMD_11_CANCEL_BUFFER); lx_buffer_cancel()
837 chip->rmh.cmd[0] |= pipe_cmd; lx_buffer_cancel()
838 chip->rmh.cmd[0] |= buffer_index; lx_buffer_cancel()
840 err = lx_message_send_atomic(chip, &chip->rmh); lx_buffer_cancel()
859 lx_message_init(&chip->rmh, CMD_0D_SET_MUTE); lx_level_unmute()
861 chip->rmh.cmd[0] |= PIPE_INFO_TO_CMD(is_capture, 0); lx_level_unmute()
863 chip->rmh.cmd[1] = (u32)(mute_mask >> (u64)32); /* hi part */ lx_level_unmute()
864 chip->rmh.cmd[2] = (u32)(mute_mask & (u64)0xFFFFFFFF); /* lo part */ lx_level_unmute()
867 "mute %x %x %x\n", chip->rmh.cmd[0], chip->rmh.cmd[1], lx_level_unmute()
868 chip->rmh.cmd[2]); lx_level_unmute()
870 err = lx_message_send_atomic(chip, &chip->rmh); lx_level_unmute()
905 lx_message_init(&chip->rmh, CMD_12_GET_PEAK); lx_level_peaks()
906 chip->rmh.cmd[0] |= PIPE_INFO_TO_CMD(is_capture, i); lx_level_peaks()
908 err = lx_message_send_atomic(chip, &chip->rmh); lx_level_peaks()
911 s0 = peak_map[chip->rmh.stat[0] & 0x0F]; lx_level_peaks()
912 s1 = peak_map[(chip->rmh.stat[0] >> 4) & 0xf]; lx_level_peaks()
913 s2 = peak_map[(chip->rmh.stat[0] >> 8) & 0xf]; lx_level_peaks()
914 s3 = peak_map[(chip->rmh.stat[0] >> 12) & 0xf]; lx_level_peaks()
H A Dlx6464es.h87 struct lx_rmh rmh; member in struct:lx6464es
/linux-4.4.14/sound/drivers/vx/
H A Dvx_pcm.c97 * @rmh: the rmh record to modify
101 * on the rmh and changes its command length.
105 static int vx_set_differed_time(struct vx_core *chip, struct vx_rmh *rmh, vx_set_differed_time() argument
113 rmh->Cmd[0] |= DSP_DIFFERED_COMMAND_MASK; vx_set_differed_time()
116 vx_set_pcx_time(chip, &pipe->pcx_time, &rmh->Cmd[1]); vx_set_differed_time()
120 rmh->Cmd[1] |= NOTIFY_MASK_TIME_HIGH ; vx_set_differed_time()
124 rmh->Cmd[1] |= MULTIPLE_MASK_TIME_HIGH; vx_set_differed_time()
128 rmh->Cmd[1] |= STREAM_MASK_TIME_HIGH; vx_set_differed_time()
130 rmh->LgCmd += 2; vx_set_differed_time()
142 struct vx_rmh rmh; vx_set_stream_format() local
144 vx_init_rmh(&rmh, pipe->is_capture ? vx_set_stream_format()
146 rmh.Cmd[0] |= pipe->number << FIELD_SIZE; vx_set_stream_format()
149 vx_set_differed_time(chip, &rmh, pipe); vx_set_stream_format()
151 rmh.Cmd[rmh.LgCmd] = (data & 0xFFFFFF00) >> 8; vx_set_stream_format()
152 rmh.Cmd[rmh.LgCmd + 1] = (data & 0xFF) << 16 /*| (datal & 0xFFFF00) >> 8*/; vx_set_stream_format()
153 rmh.LgCmd += 2; vx_set_stream_format()
155 return vx_send_msg(chip, &rmh); vx_set_stream_format()
198 struct vx_rmh rmh; vx_set_ibl() local
200 vx_init_rmh(&rmh, CMD_IBL); vx_set_ibl()
201 rmh.Cmd[0] |= info->size & 0x03ffff; vx_set_ibl()
202 err = vx_send_msg(chip, &rmh); vx_set_ibl()
205 info->size = rmh.Stat[0]; vx_set_ibl()
206 info->max_size = rmh.Stat[1]; vx_set_ibl()
207 info->min_size = rmh.Stat[2]; vx_set_ibl()
208 info->granularity = rmh.Stat[3]; vx_set_ibl()
228 struct vx_rmh rmh; vx_get_pipe_state() local
230 vx_init_rmh(&rmh, CMD_PIPE_STATE); vx_get_pipe_state()
231 vx_set_pipe_cmd_params(&rmh, pipe->is_capture, pipe->number, 0); vx_get_pipe_state()
232 err = vx_send_msg(chip, &rmh); vx_get_pipe_state()
234 *state = (rmh.Stat[0] & (1 << pipe->number)) ? 1 : 0; vx_get_pipe_state()
253 struct vx_rmh rmh; vx_query_hbuffer_size() local
255 vx_init_rmh(&rmh, CMD_SIZE_HBUFFER); vx_query_hbuffer_size()
256 vx_set_pipe_cmd_params(&rmh, pipe->is_capture, pipe->number, 0); vx_query_hbuffer_size()
258 rmh.Cmd[0] |= 0x00000001; vx_query_hbuffer_size()
259 result = vx_send_msg(chip, &rmh); vx_query_hbuffer_size()
261 result = rmh.Stat[0] & 0xffff; vx_query_hbuffer_size()
277 struct vx_rmh rmh; vx_pipe_can_start() local
279 vx_init_rmh(&rmh, CMD_CAN_START_PIPE); vx_pipe_can_start()
280 vx_set_pipe_cmd_params(&rmh, pipe->is_capture, pipe->number, 0); vx_pipe_can_start()
281 rmh.Cmd[0] |= 1; vx_pipe_can_start()
283 err = vx_send_msg(chip, &rmh); vx_pipe_can_start()
285 if (rmh.Stat[0]) vx_pipe_can_start()
297 struct vx_rmh rmh; vx_conf_pipe() local
299 vx_init_rmh(&rmh, CMD_CONF_PIPE); vx_conf_pipe()
301 rmh.Cmd[0] |= COMMAND_RECORD_MASK; vx_conf_pipe()
302 rmh.Cmd[1] = 1 << pipe->number; vx_conf_pipe()
303 return vx_send_msg(chip, &rmh); vx_conf_pipe()
311 struct vx_rmh rmh; vx_send_irqa() local
313 vx_init_rmh(&rmh, CMD_SEND_IRQA); vx_send_irqa()
314 return vx_send_msg(chip, &rmh); vx_send_irqa()
389 struct vx_rmh rmh; vx_stop_pipe() local
390 vx_init_rmh(&rmh, CMD_STOP_PIPE); vx_stop_pipe()
391 vx_set_pipe_cmd_params(&rmh, pipe->is_capture, pipe->number, 0); vx_stop_pipe()
392 return vx_send_msg(chip, &rmh); vx_stop_pipe()
411 struct vx_rmh rmh; vx_alloc_pipe() local
415 vx_init_rmh(&rmh, CMD_RES_PIPE); vx_alloc_pipe()
416 vx_set_pipe_cmd_params(&rmh, capture, audioid, num_audio); vx_alloc_pipe()
419 rmh.Cmd[0] |= BIT_SKIP_SOUND; vx_alloc_pipe()
423 rmh.Cmd[0] |= BIT_DATA_MODE; vx_alloc_pipe()
424 err = vx_send_msg(chip, &rmh); vx_alloc_pipe()
432 vx_init_rmh(&rmh, CMD_FREE_PIPE); vx_alloc_pipe()
433 vx_set_pipe_cmd_params(&rmh, capture, audioid, 0); vx_alloc_pipe()
434 vx_send_msg(chip, &rmh); vx_alloc_pipe()
457 struct vx_rmh rmh; vx_free_pipe() local
459 vx_init_rmh(&rmh, CMD_FREE_PIPE); vx_free_pipe()
460 vx_set_pipe_cmd_params(&rmh, pipe->is_capture, pipe->number, 0); vx_free_pipe()
461 vx_send_msg(chip, &rmh); vx_free_pipe()
475 struct vx_rmh rmh; vx_start_stream() local
477 vx_init_rmh(&rmh, CMD_START_ONE_STREAM); vx_start_stream()
478 vx_set_stream_cmd_params(&rmh, pipe->is_capture, pipe->number); vx_start_stream()
479 vx_set_differed_time(chip, &rmh, pipe); vx_start_stream()
480 return vx_send_msg(chip, &rmh); vx_start_stream()
491 struct vx_rmh rmh; vx_stop_stream() local
493 vx_init_rmh(&rmh, CMD_STOP_STREAM); vx_stop_stream()
494 vx_set_stream_cmd_params(&rmh, pipe->is_capture, pipe->number); vx_stop_stream()
495 return vx_send_msg(chip, &rmh); vx_stop_stream()
599 struct vx_rmh rmh; /* use a temporary rmh here */ vx_notify_end_of_buffer() local
603 vx_init_rmh(&rmh, CMD_NOTIFY_END_OF_BUFFER); vx_notify_end_of_buffer()
604 vx_set_stream_cmd_params(&rmh, 0, pipe->number); vx_notify_end_of_buffer()
605 err = vx_send_msg_nolock(chip, &rmh); vx_notify_end_of_buffer()
666 struct vx_rmh rmh; vx_update_pipe_position() local
670 vx_init_rmh(&rmh, CMD_STREAM_SAMPLE_COUNT); vx_update_pipe_position()
671 vx_set_pipe_cmd_params(&rmh, pipe->is_capture, pipe->number, 0); vx_update_pipe_position()
672 err = vx_send_msg(chip, &rmh); vx_update_pipe_position()
676 count = ((u64)(rmh.Stat[0] & 0xfffff) << 24) | (u64)rmh.Stat[1]; vx_update_pipe_position()
826 struct vx_rmh rmh; vx_pcm_prepare() local
828 vx_init_rmh(&rmh, CMD_FREE_PIPE); vx_pcm_prepare()
829 vx_set_pipe_cmd_params(&rmh, 0, pipe->number, 0); vx_pcm_prepare()
830 if ((err = vx_send_msg(chip, &rmh)) < 0) vx_pcm_prepare()
832 vx_init_rmh(&rmh, CMD_RES_PIPE); vx_pcm_prepare()
833 vx_set_pipe_cmd_params(&rmh, 0, pipe->number, pipe->channels); vx_pcm_prepare()
835 rmh.Cmd[0] |= BIT_DATA_MODE; vx_pcm_prepare()
836 if ((err = vx_send_msg(chip, &rmh)) < 0) vx_pcm_prepare()
1173 struct vx_rmh rmh; vx_init_audio_io() local
1176 vx_init_rmh(&rmh, CMD_SUPPORTED); vx_init_audio_io()
1177 if (vx_send_msg(chip, &rmh) < 0) { vx_init_audio_io()
1182 chip->audio_outs = rmh.Stat[0] & MASK_FIRST_FIELD; vx_init_audio_io()
1183 chip->audio_ins = (rmh.Stat[0] >> (FIELD_SIZE*2)) & MASK_FIRST_FIELD; vx_init_audio_io()
1184 chip->audio_info = rmh.Stat[1]; vx_init_audio_io()
H A Dvx_cmd.h212 void vx_init_rmh(struct vx_rmh *rmh, unsigned int cmd);
216 * @rmh: the rmh to be modified
221 static inline void vx_set_pipe_cmd_params(struct vx_rmh *rmh, int is_capture, vx_set_pipe_cmd_params() argument
225 rmh->Cmd[0] |= COMMAND_RECORD_MASK; vx_set_pipe_cmd_params()
226 rmh->Cmd[0] |= (((u32)param1 & MASK_FIRST_FIELD) << FIELD_SIZE) & MASK_DSP_WORD; vx_set_pipe_cmd_params()
229 rmh->Cmd[0] |= ((u32)param2 & MASK_FIRST_FIELD) & MASK_DSP_WORD; vx_set_pipe_cmd_params()
235 * @rmh: the rmh to be modified
239 static inline void vx_set_stream_cmd_params(struct vx_rmh *rmh, int is_capture, int pipe) vx_set_stream_cmd_params() argument
242 rmh->Cmd[0] |= COMMAND_RECORD_MASK; vx_set_stream_cmd_params()
243 rmh->Cmd[0] |= (((u32)pipe & MASK_FIRST_FIELD) << FIELD_SIZE) & MASK_DSP_WORD; vx_set_stream_cmd_params()
H A Dvx_cmd.c97 * @rmh: the rmh pointer to be initialized
98 * @cmd: the rmh command to be set
100 void vx_init_rmh(struct vx_rmh *rmh, unsigned int cmd) vx_init_rmh() argument
104 rmh->LgCmd = vx_dsp_cmds[cmd].length; vx_init_rmh()
105 rmh->LgStat = vx_dsp_cmds[cmd].st_length; vx_init_rmh()
106 rmh->DspStat = vx_dsp_cmds[cmd].st_type; vx_init_rmh()
107 rmh->Cmd[0] = vx_dsp_cmds[cmd].opcode; vx_init_rmh()
H A Dvx_core.c153 * vx_read_status - return the status rmh
154 * @rmh: rmh record to store the status
160 static int vx_read_status(struct vx_core *chip, struct vx_rmh *rmh) vx_read_status() argument
165 if (rmh->DspStat == RMH_SSIZE_FIXED && rmh->LgStat == 0) vx_read_status()
181 switch (rmh->DspStat) { vx_read_status()
184 rmh->Stat[0] = val & 0xffff00; vx_read_status()
185 rmh->LgStat = size + 1; vx_read_status()
189 rmh->Stat[0] = val; vx_read_status()
196 rmh->LgStat = size + 1; vx_read_status()
200 size = rmh->LgStat; vx_read_status()
201 rmh->Stat[0] = val; /* Val is the status 1st word */ vx_read_status()
220 rmh->Stat[i] = vx_inb(chip, RXH) << 16; vx_read_status()
221 rmh->Stat[i] |= vx_inb(chip, RXM) << 8; vx_read_status()
222 rmh->Stat[i] |= vx_inb(chip, RXL); vx_read_status()
234 * @rmh: the rmh record to send and receive
241 int vx_send_msg_nolock(struct vx_core *chip, struct vx_rmh *rmh) vx_send_msg_nolock() argument
254 printk(KERN_DEBUG "rmh: cmd = 0x%06x, length = %d, stype = %d\n", vx_send_msg_nolock()
255 rmh->Cmd[0], rmh->LgCmd, rmh->DspStat); vx_send_msg_nolock()
256 if (rmh->LgCmd > 1) { vx_send_msg_nolock()
258 for (i = 1; i < rmh->LgCmd; i++) vx_send_msg_nolock()
259 printk("0x%06x ", rmh->Cmd[i]); vx_send_msg_nolock()
264 if (rmh->LgCmd > 1) vx_send_msg_nolock()
265 rmh->Cmd[0] |= MASK_MORE_THAN_1_WORD_COMMAND; vx_send_msg_nolock()
267 rmh->Cmd[0] &= MASK_1_WORD_COMMAND; vx_send_msg_nolock()
276 vx_outb(chip, TXH, (rmh->Cmd[0] >> 16) & 0xff); vx_send_msg_nolock()
277 vx_outb(chip, TXM, (rmh->Cmd[0] >> 8) & 0xff); vx_send_msg_nolock()
278 vx_outb(chip, TXL, rmh->Cmd[0] & 0xff); vx_send_msg_nolock()
305 if (rmh->LgCmd > 1) { vx_send_msg_nolock()
306 for (i = 1; i < rmh->LgCmd; i++) { vx_send_msg_nolock()
314 vx_outb(chip, TXH, (rmh->Cmd[i] >> 16) & 0xff); vx_send_msg_nolock()
315 vx_outb(chip, TXM, (rmh->Cmd[i] >> 8) & 0xff); vx_send_msg_nolock()
316 vx_outb(chip, TXL, rmh->Cmd[i] & 0xff); vx_send_msg_nolock()
335 return vx_read_status(chip, rmh); vx_send_msg_nolock()
341 * @rmh: the rmh record to send and receive
346 int vx_send_msg(struct vx_core *chip, struct vx_rmh *rmh) vx_send_msg() argument
351 err = vx_send_msg_nolock(chip, rmh); vx_send_msg()
H A Dvx_mixer.c220 struct vx_rmh rmh; vx_adjust_audio_level() local
225 vx_init_rmh(&rmh, CMD_AUDIO_LEVEL_ADJUST); vx_adjust_audio_level()
227 rmh.Cmd[0] |= COMMAND_RECORD_MASK; vx_adjust_audio_level()
229 rmh.Cmd[1] = 1 << audio; vx_adjust_audio_level()
230 rmh.Cmd[2] = 0; vx_adjust_audio_level()
232 rmh.Cmd[0] |= VALID_AUDIO_IO_DIGITAL_LEVEL; vx_adjust_audio_level()
233 rmh.Cmd[2] |= info->level; vx_adjust_audio_level()
236 rmh.Cmd[0] |= VALID_AUDIO_IO_MONITORING_LEVEL; vx_adjust_audio_level()
237 rmh.Cmd[2] |= ((unsigned int)info->monitor_level << 10); vx_adjust_audio_level()
240 rmh.Cmd[0] |= VALID_AUDIO_IO_MUTE_LEVEL; vx_adjust_audio_level()
242 rmh.Cmd[2] |= AUDIO_IO_HAS_MUTE_LEVEL; vx_adjust_audio_level()
246 rmh.Cmd[0] |= VALID_AUDIO_IO_MUTE_MONITORING_1 | VALID_AUDIO_IO_MUTE_MONITORING_2; vx_adjust_audio_level()
248 rmh.Cmd[2] |= AUDIO_IO_HAS_MUTE_MONITORING_1; vx_adjust_audio_level()
251 return vx_send_msg(chip, &rmh); vx_adjust_audio_level()
260 struct vx_rmh rmh;
263 vx_init_rmh(&rmh, CMD_GET_AUDIO_LEVELS);
265 rmh.Cmd[0] |= COMMAND_RECORD_MASK;
267 rmh.Cmd[1] = 1 << audio;
268 err = vx_send_msg(chip, &rmh);
271 info.level = rmh.Stat[0] & MASK_DSP_WORD_LEVEL;
272 info.monitor_level = (rmh.Stat[0] >> 10) & MASK_DSP_WORD_LEVEL;
273 info.mute = (rmh.Stat[i] & AUDIO_IO_HAS_MUTE_LEVEL) ? 1 : 0;
274 info.monitor_mute = (rmh.Stat[i] & AUDIO_IO_HAS_MUTE_MONITORING_1) ? 1 : 0;
377 struct vx_rmh rmh; vx_get_audio_vu_meter() local
383 vx_init_rmh(&rmh, CMD_AUDIO_VU_PIC_METER); vx_get_audio_vu_meter()
384 rmh.LgStat += 2 * VU_METER_CHANNELS; vx_get_audio_vu_meter()
386 rmh.Cmd[0] |= COMMAND_RECORD_MASK; vx_get_audio_vu_meter()
389 rmh.Cmd[1] = 0; vx_get_audio_vu_meter()
391 rmh.Cmd[1] |= 1 << (audio + i); vx_get_audio_vu_meter()
392 err = vx_send_msg(chip, &rmh); vx_get_audio_vu_meter()
397 info->saturated = (rmh.Stat[0] & (1 << (audio + i))) ? 1 : 0; vx_get_audio_vu_meter()
398 info->vu_level = rmh.Stat[i + 1]; vx_get_audio_vu_meter()
399 info->peak_level = rmh.Stat[i + 2]; vx_get_audio_vu_meter()
H A Dvx_uer.c35 struct vx_rmh rmh; vx_modify_board_clock() local
37 vx_init_rmh(&rmh, CMD_MODIFY_CLOCK); vx_modify_board_clock()
40 rmh.Cmd[0] |= CMD_MODIFY_CLOCK_S_BIT; vx_modify_board_clock()
41 return vx_send_msg(chip, &rmh); vx_modify_board_clock()
49 struct vx_rmh rmh; vx_modify_board_inputs() local
51 vx_init_rmh(&rmh, CMD_RESYNC_AUDIO_INPUTS); vx_modify_board_inputs()
52 rmh.Cmd[0] |= 1 << 0; /* reference: AUDIO 0 */ vx_modify_board_inputs()
53 return vx_send_msg(chip, &rmh); vx_modify_board_inputs()
/linux-4.4.14/include/sound/
H A Dvx_core.h267 int vx_send_msg(struct vx_core *chip, struct vx_rmh *rmh);
268 int vx_send_msg_nolock(struct vx_core *chip, struct vx_rmh *rmh);

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