Searched refs:regs_spill (Results 1 - 5 of 5) sorted by relevance

/linux-4.4.14/arch/powerpc/platforms/cell/spufs/
H A Dspu_save_crt0.S30 .globl regs_spill
31 regs_spill: label
38 stqa $0, regs_spill + 0
39 stqa $1, regs_spill + 16
40 stqa $2, regs_spill + 32
41 stqa $3, regs_spill + 48
42 stqa $4, regs_spill + 64
43 stqa $5, regs_spill + 80
44 stqa $6, regs_spill + 96
45 stqa $7, regs_spill + 112
46 stqa $8, regs_spill + 128
47 stqa $9, regs_spill + 144
48 stqa $10, regs_spill + 160
49 stqa $11, regs_spill + 176
50 stqa $12, regs_spill + 192
51 stqa $13, regs_spill + 208
52 stqa $14, regs_spill + 224
53 stqa $15, regs_spill + 240
56 ila $3, regs_spill + 256
H A Dspu_restore_crt0.S31 .globl regs_spill
32 regs_spill: label
61 ila $3, regs_spill + 256
78 lqa $0, regs_spill + 0
79 lqa $1, regs_spill + 16
80 lqa $2, regs_spill + 32
81 lqa $3, regs_spill + 48
82 lqa $4, regs_spill + 64
83 lqa $5, regs_spill + 80
84 lqa $6, regs_spill + 96
85 lqa $7, regs_spill + 112
86 lqa $8, regs_spill + 128
87 lqa $9, regs_spill + 144
88 lqa $10, regs_spill + 160
89 lqa $11, regs_spill + 176
90 lqa $12, regs_spill + 192
91 lqa $13, regs_spill + 208
92 lqa $14, regs_spill + 224
93 lqa $15, regs_spill + 240
H A Dspu_restore.c48 unsigned int ls = (unsigned int)&regs_spill[0]; fetch_regs_from_mem()
49 unsigned int size = sizeof(regs_spill); fetch_regs_from_mem()
93 decr_running = regs_spill[offset].slot[0] & SPU_DECR_STATUS_RUNNING; restore_decr()
96 decr = regs_spill[offset].slot[0]; restore_decr()
111 data = regs_spill[offset].slot[0]; write_ppu_mb()
125 data = regs_spill[offset].slot[0]; write_ppuint_mb()
139 fpcr = regs_spill[offset].v; restore_fpcr()
152 srr0 = regs_spill[offset].slot[0]; restore_srr0()
165 event_mask = regs_spill[offset].slot[0]; restore_event_mask()
178 tag_mask = regs_spill[offset].slot[0]; restore_tag_mask()
206 stopped_status = regs_spill[offset].slot[0]; restore_complete()
207 stopped_code = regs_spill[offset].slot[1]; restore_complete()
H A Dspu_save.c47 regs_spill[offset].slot[0] = spu_readch(SPU_RdEventMask); save_event_mask()
58 regs_spill[offset].slot[0] = spu_readch(MFC_RdTagMask); save_tag_mask()
91 regs_spill[offset].v = spu_mffpscr(); save_fpcr()
103 regs_spill[offset].slot[0] = spu_readch(SPU_RdDec); save_decr()
115 regs_spill[offset].slot[0] = spu_readch(SPU_RdSRR0); save_srr0()
120 unsigned int ls = (unsigned int)&regs_spill[0]; spill_regs_to_mem()
121 unsigned int size = sizeof(regs_spill); spill_regs_to_mem()
H A Dspu_utils.h57 extern spu_reg128v regs_spill[NR_SPU_SPILL_REGS];

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