Searched refs:pm8001_mr32 (Results 1 - 3 of 3) sorted by relevance

/linux-4.4.14/drivers/scsi/pm8001/
H A Dpm80xx_hwi.c127 accum_len = pm8001_mr32(fatal_table_address, pm80xx_get_fatal_dump()
228 reg_val = pm8001_mr32(fatal_table_address, pm80xx_get_fatal_dump()
241 if (pm8001_mr32(fatal_table_address, pm80xx_get_fatal_dump()
272 pm8001_mr32(address, MAIN_SIGNATURE_OFFSET); read_main_config_table()
274 pm8001_mr32(address, MAIN_INTERFACE_REVISION); read_main_config_table()
276 pm8001_mr32(address, MAIN_FW_REVISION); read_main_config_table()
278 pm8001_mr32(address, MAIN_MAX_OUTSTANDING_IO_OFFSET); read_main_config_table()
280 pm8001_mr32(address, MAIN_MAX_SGL_OFFSET); read_main_config_table()
282 pm8001_mr32(address, MAIN_CNTRL_CAP_OFFSET); read_main_config_table()
284 pm8001_mr32(address, MAIN_GST_OFFSET); read_main_config_table()
286 pm8001_mr32(address, MAIN_IBQ_OFFSET); read_main_config_table()
288 pm8001_mr32(address, MAIN_OBQ_OFFSET); read_main_config_table()
292 pm8001_mr32(address, MAIN_FATAL_ERROR_RDUMP0_OFFSET); read_main_config_table()
294 pm8001_mr32(address, MAIN_FATAL_ERROR_RDUMP0_LENGTH); read_main_config_table()
296 pm8001_mr32(address, MAIN_FATAL_ERROR_RDUMP1_OFFSET); read_main_config_table()
298 pm8001_mr32(address, MAIN_FATAL_ERROR_RDUMP1_LENGTH); read_main_config_table()
302 pm8001_mr32(address, MAIN_GPIO_LED_FLAGS_OFFSET); read_main_config_table()
306 pm8001_mr32(address, MAIN_ANALOG_SETUP_OFFSET); read_main_config_table()
309 pm8001_mr32(address, MAIN_INT_VECTOR_TABLE_OFFSET); read_main_config_table()
311 pm8001_mr32(address, MAIN_SAS_PHY_ATTR_TABLE_OFFSET); read_main_config_table()
314 pm8001_mr32(address, MAIN_PORT_RECOVERY_TIMER); read_main_config_table()
325 pm8001_mr32(address, GST_GSTLEN_MPIS_OFFSET); read_general_status_table()
327 pm8001_mr32(address, GST_IQ_FREEZE_STATE0_OFFSET); read_general_status_table()
329 pm8001_mr32(address, GST_IQ_FREEZE_STATE1_OFFSET); read_general_status_table()
331 pm8001_mr32(address, GST_MSGUTCNT_OFFSET); read_general_status_table()
333 pm8001_mr32(address, GST_IOPTCNT_OFFSET); read_general_status_table()
335 pm8001_mr32(address, GST_GPIO_INPUT_VAL); read_general_status_table()
337 pm8001_mr32(address, GST_RERRINFO_OFFSET0); read_general_status_table()
339 pm8001_mr32(address, GST_RERRINFO_OFFSET1); read_general_status_table()
341 pm8001_mr32(address, GST_RERRINFO_OFFSET2); read_general_status_table()
343 pm8001_mr32(address, GST_RERRINFO_OFFSET3); read_general_status_table()
345 pm8001_mr32(address, GST_RERRINFO_OFFSET4); read_general_status_table()
347 pm8001_mr32(address, GST_RERRINFO_OFFSET5); read_general_status_table()
349 pm8001_mr32(address, GST_RERRINFO_OFFSET6); read_general_status_table()
351 pm8001_mr32(address, GST_RERRINFO_OFFSET7); read_general_status_table()
361 pm8001_mr32(address, PSPA_PHYSTATE0_OFFSET); read_phy_attr_table()
363 pm8001_mr32(address, PSPA_PHYSTATE1_OFFSET); read_phy_attr_table()
365 pm8001_mr32(address, PSPA_PHYSTATE2_OFFSET); read_phy_attr_table()
367 pm8001_mr32(address, PSPA_PHYSTATE3_OFFSET); read_phy_attr_table()
369 pm8001_mr32(address, PSPA_PHYSTATE4_OFFSET); read_phy_attr_table()
371 pm8001_mr32(address, PSPA_PHYSTATE5_OFFSET); read_phy_attr_table()
373 pm8001_mr32(address, PSPA_PHYSTATE6_OFFSET); read_phy_attr_table()
375 pm8001_mr32(address, PSPA_PHYSTATE7_OFFSET); read_phy_attr_table()
377 pm8001_mr32(address, PSPA_PHYSTATE8_OFFSET); read_phy_attr_table()
379 pm8001_mr32(address, PSPA_PHYSTATE9_OFFSET); read_phy_attr_table()
381 pm8001_mr32(address, PSPA_PHYSTATE10_OFFSET); read_phy_attr_table()
383 pm8001_mr32(address, PSPA_PHYSTATE11_OFFSET); read_phy_attr_table()
385 pm8001_mr32(address, PSPA_PHYSTATE12_OFFSET); read_phy_attr_table()
387 pm8001_mr32(address, PSPA_PHYSTATE13_OFFSET); read_phy_attr_table()
389 pm8001_mr32(address, PSPA_PHYSTATE14_OFFSET); read_phy_attr_table()
391 pm8001_mr32(address, PSPA_PHYSTATE15_OFFSET); read_phy_attr_table()
394 pm8001_mr32(address, PSPA_OB_HW_EVENT_PID0_OFFSET); read_phy_attr_table()
396 pm8001_mr32(address, PSPA_OB_HW_EVENT_PID1_OFFSET); read_phy_attr_table()
398 pm8001_mr32(address, PSPA_OB_HW_EVENT_PID2_OFFSET); read_phy_attr_table()
400 pm8001_mr32(address, PSPA_OB_HW_EVENT_PID3_OFFSET); read_phy_attr_table()
402 pm8001_mr32(address, PSPA_OB_HW_EVENT_PID4_OFFSET); read_phy_attr_table()
404 pm8001_mr32(address, PSPA_OB_HW_EVENT_PID5_OFFSET); read_phy_attr_table()
406 pm8001_mr32(address, PSPA_OB_HW_EVENT_PID6_OFFSET); read_phy_attr_table()
408 pm8001_mr32(address, PSPA_OB_HW_EVENT_PID7_OFFSET); read_phy_attr_table()
410 pm8001_mr32(address, PSPA_OB_HW_EVENT_PID8_OFFSET); read_phy_attr_table()
412 pm8001_mr32(address, PSPA_OB_HW_EVENT_PID9_OFFSET); read_phy_attr_table()
414 pm8001_mr32(address, PSPA_OB_HW_EVENT_PID10_OFFSET); read_phy_attr_table()
416 pm8001_mr32(address, PSPA_OB_HW_EVENT_PID11_OFFSET); read_phy_attr_table()
418 pm8001_mr32(address, PSPA_OB_HW_EVENT_PID12_OFFSET); read_phy_attr_table()
420 pm8001_mr32(address, PSPA_OB_HW_EVENT_PID13_OFFSET); read_phy_attr_table()
422 pm8001_mr32(address, PSPA_OB_HW_EVENT_PID14_OFFSET); read_phy_attr_table()
424 pm8001_mr32(address, PSPA_OB_HW_EVENT_PID15_OFFSET); read_phy_attr_table()
439 get_pci_bar_index(pm8001_mr32(address, read_inbnd_queue_table()
442 pm8001_mr32(address, (offset + IB_PIPCI_BAR_OFFSET)); read_inbnd_queue_table()
457 get_pci_bar_index(pm8001_mr32(address, read_outbnd_queue_table()
460 pm8001_mr32(address, (offset + OB_CIPCI_BAR_OFFSET)); read_outbnd_queue_table()
513 get_pci_bar_index(pm8001_mr32(addressib, init_default_table_values()
516 pm8001_mr32(addressib, (offsetib + 0x18)); init_default_table_values()
541 get_pci_bar_index(pm8001_mr32(addressob, init_default_table_values()
544 pm8001_mr32(addressob, (offsetob + 0x18)); init_default_table_values()
675 pm8001_mr32(pm8001_ha->general_stat_tbl_addr, mpi_init_check()
1181 pm8001_mr32(pm8001_ha->general_stat_tbl_addr, mpi_uninit_check()
H A Dpm8001_hwi.c54 pm8001_mr32(address, 0x00); read_main_config_table()
56 pm8001_mr32(address, 0x04); read_main_config_table()
58 pm8001_mr32(address, 0x08); read_main_config_table()
60 pm8001_mr32(address, 0x0C); read_main_config_table()
62 pm8001_mr32(address, 0x10); read_main_config_table()
64 pm8001_mr32(address, 0x14); read_main_config_table()
66 pm8001_mr32(address, 0x18); read_main_config_table()
68 pm8001_mr32(address, MAIN_IBQ_OFFSET); read_main_config_table()
70 pm8001_mr32(address, MAIN_OBQ_OFFSET); read_main_config_table()
72 pm8001_mr32(address, MAIN_HDA_FLAGS_OFFSET); read_main_config_table()
76 pm8001_mr32(address, MAIN_ANALOG_SETUP_OFFSET); read_main_config_table()
80 pm8001_mr32(address, MAIN_FATAL_ERROR_RDUMP0_OFFSET); read_main_config_table()
82 pm8001_mr32(address, MAIN_FATAL_ERROR_RDUMP0_LENGTH); read_main_config_table()
84 pm8001_mr32(address, MAIN_FATAL_ERROR_RDUMP1_OFFSET); read_main_config_table()
86 pm8001_mr32(address, MAIN_FATAL_ERROR_RDUMP1_LENGTH); read_main_config_table()
97 pm8001_mr32(address, 0x00); read_general_status_table()
99 pm8001_mr32(address, 0x04); read_general_status_table()
101 pm8001_mr32(address, 0x08); read_general_status_table()
103 pm8001_mr32(address, 0x0C); read_general_status_table()
105 pm8001_mr32(address, 0x10); read_general_status_table()
107 pm8001_mr32(address, 0x14); read_general_status_table()
109 pm8001_mr32(address, 0x18); read_general_status_table()
111 pm8001_mr32(address, 0x1C); read_general_status_table()
113 pm8001_mr32(address, 0x20); read_general_status_table()
115 pm8001_mr32(address, 0x24); read_general_status_table()
117 pm8001_mr32(address, 0x28); read_general_status_table()
119 pm8001_mr32(address, 0x2C); read_general_status_table()
121 pm8001_mr32(address, 0x30); read_general_status_table()
123 pm8001_mr32(address, 0x34); read_general_status_table()
125 pm8001_mr32(address, 0x38); read_general_status_table()
127 pm8001_mr32(address, 0x3C); read_general_status_table()
129 pm8001_mr32(address, 0x40); read_general_status_table()
131 pm8001_mr32(address, 0x44); read_general_status_table()
133 pm8001_mr32(address, 0x48); read_general_status_table()
135 pm8001_mr32(address, 0x4C); read_general_status_table()
137 pm8001_mr32(address, 0x50); read_general_status_table()
139 pm8001_mr32(address, 0x54); read_general_status_table()
141 pm8001_mr32(address, 0x58); read_general_status_table()
143 pm8001_mr32(address, 0x5C); read_general_status_table()
145 pm8001_mr32(address, 0x60); read_general_status_table()
159 get_pci_bar_index(pm8001_mr32(address, (offset + 0x14))); read_inbnd_queue_table()
161 pm8001_mr32(address, (offset + 0x18)); read_inbnd_queue_table()
176 get_pci_bar_index(pm8001_mr32(address, (offset + 0x14))); read_outbnd_queue_table()
178 pm8001_mr32(address, (offset + 0x18)); read_outbnd_queue_table()
241 get_pci_bar_index(pm8001_mr32(addressib, init_default_table_values()
244 pm8001_mr32(addressib, (offsetib + 0x18)); init_default_table_values()
269 get_pci_bar_index(pm8001_mr32(addressob, init_default_table_values()
272 pm8001_mr32(addressob, (offsetob + 0x18)); init_default_table_values()
544 pm8001_mr32(pm8001_ha->general_stat_tbl_addr, mpi_init_check()
737 pm8001_mr32(pm8001_ha->general_stat_tbl_addr, mpi_uninit_check()
H A Dpm8001_chips.h65 static inline u32 pm8001_mr32(void __iomem *addr, u32 offset) pm8001_mr32() function

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